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NCP372 Datasheet(PDF) 8 Page - ON Semiconductor |
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NCP372 Datasheet(HTML) 8 Page - ON Semiconductor |
8 / 12 page NCP372 http://onsemi.com 8 Operation The NCP372 provides overvoltage protection for positive and negative voltages, up to 28 V or down to −28 V. The negative protection is ensured by an internal Low RDS(on) NMOS FET. A second internal Low RDS(on) NMOS FET protects the systems (i.e.: charger) connected on the Vout pin, against positive overvoltage. At powerup, with EN pin = low, the output rises ton seconds after the input overtakes the undervoltage UVLO (Figure 3). The NCP372 provides a FLAG output, which alerts the system that a fault has occurred. The FLAG signal rises tstart seconds after the output signal rises. FLAG pin is an open drain output. Undervoltage Lockout (UVLO) To ensure proper operation under any condition, the device has a built−in undervoltage lockout (UVLO) circuit. During Vin positive going slope, the output remains disconnected from input until Vin voltage is 2.7 V nominal. The FLAG output remains low as long as Vin does not reach UVLO threshold. This circuit has a built in hysteresis to provide noise immunity to transient conditions. Overvoltage Lockout (OVLO) To protect connected systems on Vout pin from overvoltage, the device has a built−in overvoltage lockout (OVLO) circuit. During overvoltage condition, the output remains disabled until the input voltage exceeds 6.3 V. FLAG output remains low until Vin is higher than OVLO. This circuit has a built in hysteresis to provide noise immunity to transient conditions. FLAG Output The NCP372 provides a FLAG output, which alerts external systems that a fault has occurred. This pin goes low as soon the OVLO threshold is exceeded or when the Vin level is below the UVLO threshold. When Vin level recovers normal condition, FLAG goes high, after tstart delay following the output response. The pin is an open drain output, thus a pullup resistor (typically 1.0 M W, minimum 10 kW) must be provided to VCC. The FLAG level always reflects Vin status, even if the device is turned off (EN = 1). EN Input To enable normal operation, the EN pin shall be forced low or connected to ground. A high level on the pin, disconnects OUT pin from IN pin. EN does not overdrive an OVLO or UVLO fault. Negative Voltage and Reverse Current The built−in NMOS protects the downstream system from negative voltages occurring on IN pin down to −28 V. The same NMOS avoids reverse currents that could discharge the battery. When a fault occurs, the output is disconnected from IN pin and FLAG goes low. |
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