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TPS562200DDCR Datasheet(PDF) 4 Page - Texas Instruments |
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TPS562200DDCR Datasheet(HTML) 4 Page - Texas Instruments |
4 / 32 page 1 GND 6 VBST 2 SW 5 EN 3 VIN 4 VFB 4 TPS562200, TPS563200 SLVSCB0D – JANUARY 2014 – REVISED JUNE 2016 www.ti.com Product Folder Links: TPS562200 TPS563200 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated 5 Pin Configuration And Functions DDC Package 6 Pin (SOT) Top View Pin Functions PIN DESCRIPTION NAME NUMBER GND 1 Ground pin Source terminal of low-side power NFET as well as the ground terminal for controller circuit. Connect sensitive VFB to this GND at a single point. SW 2 Switch node connection between high-side NFET and low-side NFET. VIN 3 Input voltage supply pin. The drain terminal of high-side power NFET. VFB 4 Converter feedback input. Connect to output voltage with feedback resistor divider. EN 5 Enable input control. Active high and must be pulled up to enable the device. VBST 6 Supply input for the high-side NFET gate drive circuit. Connect a 0.1µF capacitor between VBST and SW pins. |
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