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TPS77925 Datasheet(PDF) 4 Page - Texas Instruments |
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TPS77925 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 22 page TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE SLVS283D – MARCH 2000 – REVISED OCTOBER 2000 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS779xx RESET timing diagram † Vres is the minimum input voltage for a valid RESET. The symbol Vres is not currently listed within EIA or JEDEC standards for semiconductor symbology. VI Vres† Vres t t t VO Threshold Voltage RESET Output 220 ms Delay 220 ms Delay Output Undefined Output Undefined VIT +‡ VIT –‡ VIT –‡ VIT +‡ ‡ VIT – Trip voltage is typically 5% lower than the output voltage (95%VO) VIT– to VIT+ is the hysteresis voltage. Terminal Functions (TPS779xx) TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION FB/SENSE 1 I Feedback input voltage for adjustable device (sense input for fixed options) RESET 2 O Reset output EN 3 I Enable input GND 4 Regulator ground IN 5, 6 I Input voltage OUT 7, 8 O Regulated output voltage |
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