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MAX11900 Datasheet(PDF) 4 Page - Maxim Integrated Products

Part # MAX11900
Description  20-Bit, 1.6Msps, Low-Power, Fully Differential
Download  29 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX11900 Datasheet(HTML) 4 Page - Maxim Integrated Products

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REFVDD, REF, REFIN, OVDD to GND ..................-0.3V to +4V
AVDD, DVDD to GND .............................................-0.3V to +2V
DGND to AGND, REFGND ..................................-0.3V to +0.3V
AIN+, AIN- to GND ...... -0.3V to the lower of (VREF + 0.3V) and
+4V or ±130mA
SCLK, DIN, DOUT, CNVST, to GND........... -0.3V to the lower of
(VOVDD + 0.3V) and +4V
Maximum Current into Any Pin...........................................50mA
Continuous Power Dissipation (TA = +70°C)
TQFN (derate 30.30mW/°C above +70°C).............2424.2mW
Operating Temperature Range........................... -40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range............................ -65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow).......................................+260°C
TQFN
Junction-to-Ambient Thermal Resistance (θJA).... ......33°C/W
Junction-to-Case Thermal Resistance (θJC) ............... 2°C/W
(Note 1)
(fSAMPLE = 1.6Msps, VAVDD = 1.8V, VDVDD = 1.8V, VOVDD = 1.5V to 3.6V, VREFVDD = 3.6V, VREF = 3.3V, Internal Ref Buffers On,
TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ANALOG INPUT
Input Voltage Range (Note 3)
(AIN+) - (AIN-)
-VREF
+VREF
V
Absolute Input Voltage Range
AIN+, AIN- relative to AGND
-0.1
VREF +
0.1
V
Common-Mode Input Range
[(AIN+) + (AIN-)]/2
VREF/2 -
0.1
VREF/2
VREF/2
+ 0.1
V
Input Leakage Current
Acquisition phase
-1
0.001
+1
µA
Input Capacitance
32
pF
STATIC PERFORMANCE (Note 4)
Resolution
N
20
Bits
Resolution
LSB
VREF = 3.3V
6.3
µV
No Missing Codes
20
Bits
Offset Error (Note 4)
-10
±1
+10
LSB
Offset Temperature Coefficient
±0.01
LSB/°C
Gain Error
Referred to REFIN reference input
-175
±20
+175
LSB
Gain Error Temperature
Coefficient (Note 5)
Referred to REFIN reference input
±0.2
LSB/°C
Gain Error
Referred to REF pins
-42
±10
+42
LSB
Gain Error Temperature
Coefficient (Note 5)
Referred to REF pins
±0.12
LSB/°C
Integral Nonlinearity
INL
-6
±1.5
+6
LSB
MAX11905
20-Bit, 1.6Msps, Low-Power, Fully Differential
SAR ADC
www.maximintegrated.com
Maxim Integrated │ 4
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics
Electrical Characteristics


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