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DP7251 Datasheet(PDF) 3 Page - Copal Electronics |
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DP7251 Datasheet(HTML) 3 Page - Copal Electronics |
3 / 15 page DP7251 © NIDEC COPAL ELECTRONICS CORP. 3 Doc. No. MD-2017 Rev. F Characteristics subject to change without notice SERIAL BUS PROTOCOL The DP7251 supports the SPI bus data transmission protocol. The synchronous Serial Peripheral Interface (SPI) helps the DP7251 to interface directly with many of today's popular microcontrollers. The DP7251 contains an 8-bit instruction register. The instruction set and the operation codes are detailed in Table 3, Instruction Set on page 8. After the device is selected with CS ¯¯¯ going low the first byte will be received. The part is accessed via the SI pin, with data being clocked in on the rising edge of SCK. The first byte contains one of the six op-codes that define the operation to be performed. DEVICE OPERATION The DP7251 is four resistor arrays integrated with an SPI serial interface logic, four 8-bit wiper control registers and sixteen 8-bit, non-volatile memory data registers. Each resistor array contains 255 separate resistive elements connected in series. The physical ends of each array are equivalent to the fixed terminals of a mechanical potentiometer (RH and RL). RH and RL are symmetrical and may be interchanged. The tap positions between and at the ends of the series resistors are connected to the output wiper terminals (RW) by a CMOS transistor switch. Only one tap point for each potentiometer is connected to its wiper terminal at a time and is determined by the value of the wiper control register. Data can be read or written to the wiper control registers or the non-volatile memory data registers via the SPI bus. Additional instructions allow data to be transferred between the wiper control registers and each respective potentiometer's non- volatile data registers. Also, the device can be instructed to operate in an "increment/decrement" mode. ABSOLUTE MAXIMUM RATINGS (1) s t i n U s g n i t a R r e t e m a r a P C ° 5 2 1 + o t 5 5 - s a i B r e d n U e r u t a r e p m e T C ° 0 5 1 + o t 5 6 - e r u t a r e p m e T e g a r o t S Voltage on any Pin with Respect to VSS (2)(3) -2.0 to +VCC +2.0 V VCC V 0 . 7 + o t 0 . 2 - d n u o r G o t t c e p s e R h t i w Package Power Dissipation Capability (TA = 25°C) 1.0 W Lead Soldering Temperature (10 secs) 300 °C A m 6 ± t n e r r u C r e p i W Recommended Operating Conditions VCC =+2.5V to +6V Notes: (1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. (2) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20ns. Maximum DC voltage on output pins is VCC +0.5V, which may overshoot to VCC +2.0V for periods of less than 20ns. (3) Latch-up protection is provided for stresses up to 100mA on address and data pins from –1V to VCC + 1V. s t i n U s g n i t a R r e t e m a r a P Operating Ambient Temperature (Industrial) -40 to +85 °C |
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