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LPC2194JBD64 Datasheet(PDF) 10 Page - NXP Semiconductors |
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LPC2194JBD64 Datasheet(HTML) 10 Page - NXP Semiconductors |
10 / 33 page Philips Semiconductors LPC2194 Single-chip 16/32-bit microcontrollers Preliminary data Rev. 01 — 06 February 2004 10 of 33 9397 750 12757 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. 6.4 Memory map The LPC2194 memory map incorporates several distinct regions, as shown in the following figures. In addition, the CPU interrupt vectors may be re-mapped to allow them to reside in either Flash memory (the default) or on-chip static RAM. This is described in Section 6.20 “System control”. 6.5 Interrupt controller The Vectored Interrupt Controller (VIC) accepts all of the interrupt request inputs and categorizes them as FIQ, vectored IRQ, and non-vectored IRQ as defined by programmable settings. The programmable assignment scheme means that priorities of interrupts from the various peripherals can be dynamically assigned and adjusted. Fig 3. LPC2194 memory map. AHB PERIPHERALS VPB PERIPHERALS RESERVED ADDRESS SPACE BOOT BLOCK (RE-MAPPED FROM ON-CHIP FLASH MEMORY RESERVED ADDRESS SPACE 16 KBYTE ON-CHIP STATIC RAM RESERVED ADDRESS SPACE 256 KBYTE ON-CHIP FLASH MEMORY 0xFFFF FFFF 0xF000 0000 0xEFFF FFFF 0xE000 0000 0xC000 0000 0xDFFF FFFF 0x8000 0000 0x7FFF FFFF 0x7FFF E000 0x7FFF DFFF 0x4001 0000 0x4000 3FFF 0x4000 0000 0x3FFF FFFF 0x0004 0000 0x0003 FFFF 4.0 GB 3.75 GB 3.5 GB 3.0 GB 2.0 GB 1.0 GB 0.0 GB 0x0000 0000 002aaa757 |
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