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TPS92410D Datasheet(PDF) 3 Page - Texas Instruments |
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TPS92410D Datasheet(HTML) 3 Page - Texas Instruments |
3 / 25 page 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC MULT TSNS CPS CDD DOV GDL CS GND COMP ADIM VREF VIN TPS92410 www.ti.com SLUSBW9 – MAY 2014 5 Pin Configuration and Functions SOIC HV 13 PIN (TOP VIEW) Pin Functions PIN TYPE(1) DESCRIPTION NAME NO. Analog input used to set the reference of the linear controller. A 0-V to 1.5-V signal on ADIM sets the current ADIM 9 I sense reference level. A capacitor to ground sets the time interval for dimmer detection. Tie to GND if no phase dimmer operation CDD 2 I/O is required. COMP 7 I/O Compensation for control loop. Connect a capacitor from the COMP pin to ground. A capacitor to ground sets the length of the CDD pin charge pulse. Leave open if no phase dimmer CPS 1 I/O operation is required. CS 5 I Current sense input used for linear regulator. Input to monitor linear MOSFET drain voltage. A resistor divider from the DOV pin to the drain connection of DOV 3 I the MOSFET monitors MOSFET over-voltage. Add a capacitor to GND for filtering. GDL 4 O Gate drive for an external linear MOSFET. GND 6 G Chip ground return. MULT 11 I AC input to the multiplier. Tap a resistor divider off the rectified line to this pin. TSNS 8 I Thermal sense input. Connect to a resistor and NTC thermistor for thermal foldback. VCC 12 I/O Pre-regulated voltage. Connect a bypass capacitor to ground. VIN 14 P High voltage input. Provides power to the device. VREF 10 O 3-V voltage supply reference. Source used for TSNS input. (1) I = Input, O = Output, P = Supply, G = Ground Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS92410 |
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