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BR24G128F-3GTE2 Datasheet(PDF) 4 Page - Rohm |
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BR24G128F-3GTE2 Datasheet(HTML) 4 Page - Rohm |
4 / 37 page Datasheet 4/33 BR24G128-3 TSZ02201-0R2R0G100230-1-2 04.Jul.2013 Rev.004 ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 www.rohm.com Block Diagram Figure 3. Block Diagram Pin Configuration (TOP VIEW) Pin Descriptions Terminal Name Input/ Output Descriptions A0 Input Slave address setting* A1 Input Slave address setting* A2 Input Slave address setting* GND - Reference voltage of all input / output, 0V SDA Input/ Output Serial data input serial data output SCL Input Serial clock input WP Input Write protect terminal VCC - Connect the power source. *A0, A1 and A2 are not allowed to use as open. 8 7 6 5 4 3 2 1 SDA SCL WP VCC GND A2 A1 A0 Address Decoder Word Address Register Data Register Control Circuit High Voltage Generating Circuit Power source Voltage Detection 8bit ACK START STOP 14bit 128Kbit EEPROM Array 2 5 6 V CC SCL GND BR24G128-3 1 3 4 7 8 WP SDA A2 A1 A0 |
Similar Part No. - BR24G128F-3GTE2 |
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