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NOIP1SE5000A-QTI Datasheet(PDF) 10 Page - ON Semiconductor

Part # NOIP1SE5000A-QTI
Description  PYTHON 5.0/2.0 MegaPixels Global Shutter CMOS Image Sensors
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
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NOIP1SE5000A-QTI Datasheet(HTML) 10 Page - ON Semiconductor

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10
Analog Front End
The AFE contains 16 channels, each containing a PGA
and a 10−bit ADC.
For each of the 16 channels, a pipelined 10−bit ADC is
used to convert the analog image data into a digital signal,
which is delivered to the data formatting block. A black
calibration loop is implemented to ensure that the black level
is mapped to match the correct ADC input level.
Data Formatting
The data block receives data from two ADCs and
multiplexes this data to one data stream. A cyclic
redundancy check (CRC) code is calculated on the passing
data.
A frame synchronization data block transmits
synchronization codes such as frame start, line start, frame
end, and line end indications.
The data block calculates a CRC once per line for every
channel. This CRC code can be used for error detection at the
receiving end.
Serializer and LVDS Interface
The serializer and LVDS interface block receives the
formatted (10−bit or 8−bit) data from the data formatting
block. This data is serialized and transmitted by the LVDS
output driver.
In 10−bit mode, the maximum output data rate is
720 Mbps per channel. In 8−bit mode, the maximum output
data rate is 576 Mbps per channel.
In addition to the LVDS data outputs, two extra LVDS
outputs are available. One of these outputs carries the output
clock, which is skew aligned to the output data channels. The
second LVDS output contains frame format synchronization
codes to serve system−level image reconstruction.
Channel Multiplexer
The P1−SN/SE/FN LVDS channel multiplexer provides
a 8:4, 8:2 and 8:1 feature, in addition to utilizing all 8 output
channels.
The P3−SN/SE/FN LVDS channel multiplexer provides
a 4:2 and 4:1 feature, in addition to utilizing all 4 output
channels.
Sequencer
The sequencer:
Controls the image core. Starts and stops integration
and control pixel readout.
Operates the sensor in master or slave mode.
Applies the window settings. Organizes readouts so that
only the configured windows are read.
Controls the column multiplexer and analog core.
Applies gain settings and subsampling modes at the
correct time, without corrupting image data.
Starts up the sensor correctly when leaving standby
mode.
Automatic Exposure Control
The AEC block implements a control system to modulate
the exposure of an image. Both integration time and gains
are controlled by this block to target a predefined
illumination level.


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