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Elmos Semiconductor AG

Data Sheet

QM-No.: 25DS0046E.03

PRODUCTION DATA - JAN 15, 2015

Elmos Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.

KNX/ EIB TRANSCEIVER

E981.03

Pin Description

Pin

Name

Pull

Description

1

OTEMP

D_O

-

Over-temperature warning

2

RESET

D_IO

Up

Bidirectional reset pin (low active)

3

i.c.

-

-

Reserved for factory use, connect to GND during operation.

4

AOUT

A_O

-

Analog multiplexer output

5

SETVCC

D_I

2)

Combination of

- selection of the VCC output voltage and

- alarm function activation

6

V33I

S

-

3.3V internal supply: Connect to external capacitor

7

WK

HV_D_IO -

Output with tri-state capability; used for KNX telegram trigger

Output [default]: VIO related output levels

Input: VST tolerant. Thresholds V

8

CREC

HV_A_I

-

Receive pin for KNX bus communication

9

BUSN

S

-

Connection to the negative bus line

10

RTXL

HV_A_IO -

Ground connection of external resistor RTX

11

RTXH

HV_A_IO -

KNX send output pin - upper connection of external resistor RTX

12

BUSP

HV_S

-

Connection to positive KNX bus via external diode for reverse polar-

ity protection

13

i.c.

-

-

Reserved for factory use, connect to GND during operation.

14

V20

HV_S

-

20V DC supply output

15

VST

HV_S

-

Connection to external storage capacitor CST

16

i.c.

-

-

Do not connect externally

17

SW

HV_A_IO -

Switched output of DC/ DC converter

18

VCC

A_I

-

DC/ DC converter output voltage control input

19

VIO

S

-

Supply for digital IO pins (connect to VCC if no external supply is

used)

20

BS0

D_I

Down

Baud rate select pin 0

21

BS1

D_I

Down

Baud rate select pin 1

22

INT

D_O

-

Used for KNX collision trigger (low active)

23

EXTAL

D_O

-

External crystal terminal 2

24

XTAL

D_I

-

External crystal terminal 1 or clock input if no crystal is connected

25

TXD

D_O

-

UART transmit signal: from E981.03 to host processor (push/pull)

26

RXD

D_I

Down

UART receive signal: from host processor to E981.03

27

GND

S

-

GND pin

28

SCS

D_I

Up

SPI chip select (low active) or General Purpose Input if SPI is disabled

29

SCK

D_I

Down

SPI clock or GPI if SPI is disabled

30

MISO

D_IO

-

SPI master in slave out data line or GPIO if SPI is disabled

31

MOSI

D_IO

-

SPI master out slave in data line or GPIO if SPI is disabled

32

SAVE

D_O

Up

VST under voltage pre alarm signal (low active)

33

EP

Exposed Die Pad

1) D = digital, A = analog, S = supply, I = input, O = output, HV = high voltage

2) Internally weak pulled to V33I/2. A open pin is the alarm condition. To select a VCC voltage push it to VIO or pull it to GND.