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SN74LVC2G02DCTR Datasheet(PDF) 1 Page - Texas Instruments

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Part # SN74LVC2G02DCTR
Description  DUAL 2 INPUT POSITIVE NOR GATE
Download  12 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

SN74LVC2G02DCTR Datasheet(HTML) 1 Page - Texas Instruments

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SN74LVC2G02
DUAL 2INPUT POSITIVENOR GATE
SCES194J − APRIL 1999 − REVISED SEPTEMBER 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Available in the Texas Instruments
NanoStar
 and NanoFree Packages
D Supports 5-V VCC Operation
D Inputs Accept Voltages to 5.5 V
D Max tpd of 4.9 ns at 3.3 V
D Low Power Consumption, 10-µA Max ICC
D ±24-mA Output Drive at 3.3 V
D Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
D Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C
D Ioff Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 1000-V Charged-Device Model (C101)
description /ordering information
This dual 2-input positive-NOR gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G02 performs the Boolean function Y = A + B or Y = A
• B in positive logic.
NanoStar
 and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING‡
NanoStar
 − WCSP (DSBGA)
0.17-mm Small Bump − YEA
SN74LVC2G02YEAR
NanoFree
 − WCSP (DSBGA)
0.17-mm Small Bump − YZA (Pb-free)
Reel of 3000
SN74LVC2G02YZAR
_ _ _CB_
−40
°C to 85°C
NanoStar
 − WCSP (DSBGA)
0.23-mm Large Bump − YEP
Reel of 3000
SN74LVC2G02YEPR
_ _ _CB_
−40
°C to 85°C
NanoFree
 − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
SN74LVC2G02YZPR
SSOP − DCT
Reel of 3000
SN74LVC2G02DCTR
C02_ _ _
VSSOP − DCU
Reel of 3000
SN74LVC2G02DCUR
C02_
VSSOP − DCU
Reel of 250
SN74LVC2G02DCUT
C02_
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
‡ DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,
and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb,
= Pb-free).
Copyright
 2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
DCT OR DCU PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
1A
1B
2Y
GND
VCC
1Y
2B
2A
4
3
2
1
5
6
7
8
GND
2Y
1B
1A
2A
2B
1Y
VCC
YEA, YEP, YZA, OR YZP PACKAGE
(BOTTOM VIEW)
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.


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