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IS64VF25618EC-7.5B2A3 Datasheet(PDF) 10 Page - Integrated Silicon Solution, Inc

Part # IS64VF25618EC-7.5B2A3
Description  128K x36/32 and 256K x18 4Mb, ECC, SYNCHRONOUS FLOW-THROUGH SRAM
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS64VF25618EC-7.5B2A3 Datasheet(HTML) 10 Page - Integrated Silicon Solution, Inc

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IS61(4)LF12836EC/IS61(4)VF12836EC/IS61(4)LF12832EC
IS61(4)VF12832EC/IS61(4)LF25618EC/IS61(4)VF25618EC
Integrated Silicon Solution, Inc.- www.issi.com
Rev. C1
09/30/2015
10
128K x 32, 100PIN QFP (Top View)
NC
1
80
NC
DQc
2
79
DQb
DQc
3
78
DQb
VDDQ
4
77
VDDQ
VSS
5
76
VSS
DQc
6
75
DQb
DQc
7
74
DQb
DQc
8
73
DQb
DQc
9
72
DQb
VSS
10
71
VSS
VDDQ
11
70
VDDQ
DQc
12
69
DQb
DQc
13
68
DQb
NC
14
67
VSS
VDD
15
66
NC
NC
16
65
VDD
VSS
17
64
ZZ
DQd
18
63
DQa
DQd
19
62
DQa
VDDQ
20
61
VDDQ
VSS
21
60
VSS
DQd
22
59
DQa
DQd
23
58
DQa
DQd
24
57
DQa
DQd
25
56
DQa
VSS
26
55
VSS
VDDQ
27
54
VDDQ
DQd
28
53
DQa
DQd
29
52
DQa
NC
30
51
NC
128K x 32
Note: A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired.
PIN DESCRIPTIONS
Symbol
Pin Name
Symbol
Pin Name
CLK
Synchronous Clock
/BWx (x=a-d)
Synchronous Byte Write Inputs
A0,A1
Synchronous Burst Address Inputs
/GW
Synchronous Global Write Enable
A
Synchronous Address Inputs
/OE
Asynchronous Output Enable
/ADV
Synchronous Burst Address Advance
DQx
Synchronous Data Inputs/Outputs
/ADSP
Synchronous Address Status Processor
ZZ
Asynchronous Power Sleep Mode
/ADSC
Synchronous Address Status Controller
NC
No Connect
MODE
Burst Sequence Selection
VDD
Power Supply
/CE,CE2,/CE2
Synchronous Chip Enable
VDDQ
I/O Power Supply
/BWE
Synchronous Byte Write Enable
VSS
Ground


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