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VP101-3BADP Datasheet(PDF) 5 Page - Zarlink Semiconductor Inc |
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VP101-3BADP Datasheet(HTML) 5 Page - Zarlink Semiconductor Inc |
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5 / 10 page  VP101 4 NOTE: Typical with full scale IOG = 26.68mA, RSET = 542Ω, VREF = 1.2V, ISYNC connected to IOG Table 1: Video output truth table Full Scale output current is set by an external resistor (RSET) between the FS ADJUST pin and AGND. RSET has a typical value of 542 Ω for generation of RS-343A video into a 37.5 Ω load. The VP101 may be used in applications where an external 1.2V (typical) reference is provided, in which case the external reference should be temperature compensated and provide a low impedance output. The D-A converters on the VP101 use a segmented architecture in which bit currents are routed to either the output or AGND by a sophisticated decoding scheme.This architecture eliminates the need for precision component ratios and greatly reduces the switching transients associated with turning current sources on or off. Monotonicity and low glitch energy are guaranteed by using identical current sources and current steering their outputs. An on-chip operational amplifier stabilises the full scale output current against temperature and power supply variations. The analog outputs of the VP101 are capable of directly driving a 37.5 Ω load, such as a doubly terminated 75Ω co- axial cable or interpolation filters. CIRCUIT DESCRIPTION As shown in the Fig. 2, the VP101 contains three 8-bit D-A converters, input latches, and a loop amplifier. On the rising edge of each clock cycle, (see Fig. 4), 24 bits of colour information (R0-R7, G0-G7, and B0-B7) are latched into the device and presented to the three 8-bit D-A converters. The REF WHITE input, also latched on the rising edge of each clock cycle, and will force the inputs of each D- A converter to $FF. SYNC and BLANK are latched on the rising edge of the clock to maintain synchronisation with the colour data. These inputs add appropriately weighted currents to the analog outputs, producing the specific output levels required for video applications as shown in Fig. 3. Table 1 details how the SYNC, BLANK, and REFWHITE inputs modify the output levels. The ISYNC current output is typically connected directly to the IOG output and is used to encode sync information onto the IOG output. If ISYNC is not connected to the IOG output, sync information will not be encoded on the green channel, and the IOR, IOG and IOB outputs will have the same full scale output current. Fig.3 Composite video output waveform Description IOG (mA) IOR/IOB (mA) REF WHITE SYNC BLANK DAC I/P Data White Level 26.68 19.06 1 1 1 $XX White Level 26.68 19.06 0 1 1 $FF Data Data + 9.06 Data + 1.44 0 1 1 Data Data-Sync Data + 1.44 Data + 1.44 0 0 1 Data Blank Level 9.06 1.44 0 1 1 $00 Blank-Sync 1.44 1.44 0 0 1 $00 Blank Level 7.62 0 X 1 0 $XX Sync Level 0 0 X 0 0 $XX |
Similar Part No. - VP101-3BADP |
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Similar Description - VP101-3BADP |
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