CY7C65640
Document #: 38-08019 Rev. *E
Page 11 of 27
6.0
Pin Description Table
Table 6-1 below displays the pin assignments for the CY7C65640.
Table 6-1. Pin Assignments
Pin
Name
Type
Default
Description
3
VCC
Power
N/A
VCC. This signal provides power to the chip.
7
VCC
Power
N/A
VCC. This signal provides power to the chip.
11
VCC
Power
N/A
VCC. This signal provides power to the chip.
15
VCC
Power
N/A
VCC. This signal provides power to the chip.
19
VCC
Power
N/A
VCC. This signal provides power to the chip.
23
VCC
Power
N/A
VCC. This signal provides power to the chip.
27
VCC
Power
N/A
VCC. This signal provides power to the chip.
33
VCC
Power
N/A
VCC. This signal provides power to the chip.
39
VCC
Power
N/A
VCC. This signal provides power to the chip.
45
VCC
Power
N/A
VCC. This signal provides power to the chip.
55
VCC
Power
N/A
VCC. This signal provides power to the chip.
4
GND
Power
N/A
GND. Connect to Ground with as short a path as possible.
8
GND
Power
N/A
GND. Connect to Ground with as short a path as possible.
12
GND
Power
N/A
GND. Connect to Ground with as short a path as possible.
16
GND
Power
N/A
GND. Connect to Ground with as short a path as possible.
20
GND
Power
N/A
GND. Connect to Ground with as short a path as possible.
24
GND
Power
N/A
GND. Connect to Ground with as short a path as possible.
28
GND
Power
N/A
GND. Connect to Ground with as short a path as possible.
34
GND
Power
N/A
GND. Connect to Ground with as short a path as possible.
40
GND
Power
N/A
GND. Connect to Ground with as short a path as possible.
47
GND
Power
N/A
GND. Connect to Ground with as short a path as possible.
50
GND
Power
N/A
GND. Connect to Ground with as short a path as possible.
56
GND
Power
N/A
GND. Connect to Ground with as short a path as possible.
21
XIN
Input
N/A
24-MHz Crystal IN or External Clock Input.
22
XOUT
Output
N/A
24-MHz Crystal OUT.
46
RESET#
Input
N/A
Active LOW Reset. This pin resets the entire chip. It is normally tied to VCC
through a 100K resistor, and to GND through a 0.1-µF capacitor. Other than
this, no other special power-up procedure is required.
26
BUSPOWER
Input
N/A
VBUS. Connect to the VBUS pin of the upstream connector. This signal
indicates to the hub that it is in a powered state, and may enable the D+ pull-up
resistor to indicate a connection. (The hub will do so after the external
EEPROM is read, unless it is put into a high-speed mode by the upstream
hub). The hub can not be bus powered, and the VBUS signal must not be
used as a power source.
SPI INTERFACE
25
SPI_CS
O
O
SPI Chip Select. Connect to CS pin of the EEPROM.
48
SPI_SCK
O
O
SPI Clock. Connect to EEPROM SCK pin.
49
SPI_SD
I/O/Z
Z
SPI Dataline Connect to GND with 15-K
Ω resistor and to the Data I/O pins
of the EEPROM.
UPSTREAM PORT
17
D–
I/O/Z
Z
Upstream D– Signal.
18
D+
I/O/Z
Z
Upstream D+ Signal.
DOWNSTREAM PORT 1
13
DD–[1]
I/O/Z
Z
Downstream D– Signal.