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GM71CS17400CL Datasheet(PDF) 4 Page - Hynix Semiconductor |
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GM71CS17400CL Datasheet(HTML) 4 Page - Hynix Semiconductor |
4 / 10 page GM71C(S)17400C/CL Rev 0.1 / Apr’01 Capacitance (VCC = 5.0V+/-10%, TA = 25C) AC Characteristics (VCC = 5.0V+/-10%, Vss=0V, TA = 0 ~ 70C, Notes 1, 2, 18,19) Read, Write, Read-Modify-Write and Refresh Cycles (Common Parameters) Symbol Parameter Note CI1 CI2 CI/O Input Capacitance (Address) Input Capacitance (Clocks) Output Capacitance (Data-In/Out) 1 1 1, 2 Unit pF pF pF Max 5 7 7 Min - - - Input rise and fall times : 5ns Input timing reference levels : 0.8V, 2.4V Output timing reference levels : 0.4V, 2.4V Output load : 2 TTL gate + CL (100pF) (Including scope and jig) Note: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method. 2. CAS = VIH to disable DOUT. Test Conditions Symbol Parameter Note Max Unit Min Max Min Max Min tRC 90 - 110 - 130 - tRP 30 - 40 - 50 - tRAS 50 10,000 60 10,000 70 10,000 tCAS 10,000 10,000 10,000 15 18 tASR 0 - - - 0 0 tRAH 7 - - - 10 10 tASC 0 - - - 0 0 tCAH - - - 10 15 tRCD 17 45 45 52 20 20 3 tRAD 12 30 30 35 15 15 4 tRSH 13 - - - 15 18 tCSH 50 - - - 60 70 tCRP 5 - - - 5 5 tT 3 50 50 50 3 3 7 tDZO 0 - - - 0 0 tDZC 0 - - - 0 0 GM71C(S)17400 C/CL-5 13 - - - 15 18 5 6 6 tCP - 10 - 10 - tODD GM71C(S)17400 C/CL-6 GM71C(S)17400 C/CL-7 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 13 7 7 Random Read or Write Cycle Time Row Address Set up Time Row Address Hold Time Column Address Set-up Time Column Address Hold Time RAS Hold Time Transition Time (Rise and Fall) RAS Precharge Time RAS to CAS Delay Time RAS to Column Address Delay Time CAS Hold Time CAS to RAS Precharge Time OE Delay Time from DIN CAS Delay Time from DIN OE to DIN Delay Time CAS Precharge Time RAS Pulse Width CAS Pulse Width |
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