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TAS6424QDKQQ1 Datasheet(PDF) 7 Page - Texas Instruments |
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TAS6424QDKQQ1 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 68 page 7 TAS6424-Q1 www.ti.com SLOS870A – SEPTEMBER 2016 – REVISED OCTOBER 2016 Product Folder Links: TAS6424-Q1 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 7.3 Recommended Operating Conditions MIN NOM MAX UNIT PVDD Output FET supply voltage Relative to GND 4.5 26.4 V VBAT Battery supply voltage input Relative to GND 4.5 14.4 18 V VDD DC logic supply Relative to GND 3.0 3.3 3.5 V TA Ambient temperature –40 125 °C TJ Junction temperature An adequate thermal design is required –40 150 °C RL Nominal speaker load impedance BTL Mode 2 4 Ω PBTL Mode 1 2 RPU_I2C I2C pullup resistance on SDA and SCL pins 1 4.7 10 kΩ CBypass External capacitance on bypass pins Pin 2, 3, 5, 6, 8, 9, 10, 19 1 µF COUT External capacitance to GND on OUT pins Limit set by DC-diagnostic timing 1 3.3 µF (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report (SPRA953). (2) JEDEC Standard 4 Layer PCB. (3) Measured using the TAS6424-Q1 EVM layout and heat sink. The device is not intended to be used without a heat sink. 7.4 Thermal Information THERMAL METRIC(1) TAS6424-Q1(2) TAS6424-Q1(3) UNIT DKQ (HSSOP) DKQ (HSSOP) 56 PINS 56 PINS RθJA Junction-to-ambient thermal resistance — — °C/W RθJC(top) Junction-to-case (top) thermal resistance 0.7 1.1 °C/W RθJB Junction-to-board thermal resistance — — °C/W ψJT Junction-to-top characterization parameter — — °C/W ψJB Junction-to-board characterization parameter 10 10 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance — — °C/W 7.5 Electrical Characteristics Test conditions (unless otherwise noted): TC = 25°C, PVDD = VBAT = 14.4 V, VDD = 3.3 V, RL = 4 Ω, Pout = 1 W/ch, ƒ = 1 kHz, fSW = 2.11 MHz, AES17 Filter, default I 2C settings, see Figure 79 and Figure 82 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OPERATING CURRENT IPVDD_IDLE PVDD idle current All channels playing, no audio input 75 mA IVBAT_IDLE VBAT idle current All channels playing, no audio input 100 mA IPVDD_STBY PVDD standby current STANDBYActive, VDD = 0 V 10 μA IVBAT_STBY VBAT standby current STANDBYActive, VDD = 0 V 10 μA IVDD VDD supply current All channels playing, –60-dB signal 15 mA OUTPUT POWER PO_BTL Output power per channel, BTL 4 Ω, PVDD = 14.4 V, THD+N = 1%, TC = 75°C 20 22 W 4 Ω, PVDD = 14.4 V, THD+N = 10%, TC = 75°C 25 27 2 Ω, PVDD = 14.4 V, THD+N = 1%, TC = 75°C 38 40 2 Ω, PVDD = 14.4 V, THD+N = 10%, TC = 75°C 42 45 4 Ω, PVDD = 25 V, THD+N = 1%, TC = 75°C 50 55 4 Ω, PVDD = 25 V, THD+N = 10%, TC = 75°C 70 75 PO_PBTL Output power per channel in parallel mode, PBTL 2 Ω, PVDD = 14.4 V, THD+N = 1%, TC = 75°C 40 40 W 2 Ω, PVDD = 14.4 V, THD+N = 10%, TC = 75°C 50 50 1 Ω, PVDD = 14.4 V, THD+N = 1%, TC = 75°C 80 80 1 Ω, PVDD = 14.4 V, THD+N = 10%, TC = 75°C 90 90 2 Ω, PVDD = 25 V, THD+N = 1%, TC = 75°C 120 120 2 Ω, PVDD = 25 V, THD+N = 10%, TC = 75°C 150 150 EFFP Power efficiency 4 channels operating, 25-W output power/ch 4-Ω load, PVDD = 14.4 V, TC = 25°C 86% |
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