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DLP9000XFLS Datasheet(PDF) 10 Page - Texas Instruments |
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DLP9000XFLS Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 59 page  10 DLP9000 DLPS036B – SEPTEMBER 2014 – REVISED OCTOBER 2016 www.ti.com Product Folder Links: DLP9000 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated (1) The following power supplies are required to operate the DMD: VCC, VCCI, VOFFSET, VBIAS, and VRESET. VSS must also be connected. Pin Functions PIN TYPE (I/O/P) SIGNAL DESCRIPTION NAME (1) NO. VBIAS A3, A9, A5, A11, A7, B2 Power Analog Supply voltage for positive Bias level of Micromirror reset signal. VOFFSET L1, N1, R1 Power Analog Supply voltage for HVCMOS logic. U1, W1 Power Analog Supply voltage for stepped high voltage at Micromirror address electrodes. AC1, AA1 Power Analog Supply voltage for Offset level of MBRST(31:0). VRESET L31, N31, R31, U31, W31, AA31 Power Analog Supply voltage for negative Reset level of Micromirror reset signal. VCC A21, A23, A25, A27, A29, C1, C31, E31, G31, J31, K2, AC31, AE31, AG1, AG31, AJ31, AK2, AK30, AL3, AL5, AL7, AL21, AL23, AL25, AL27 Power Analog Supply voltage for LVCMOS core logic. Supply voltage for normal high level at Micromirror address electrodes. VCCI H18, H24, M6, M26, P6, P26, T6, T26, V6, V26, Y6, Y26, AD6, AD12, AD18, AD24 Power Analog Supply voltage for LVDS receivers. VSS A1, B12, B18, B24, B30, C7, C13, C19, C25, D6, D12, D18, D24, D30, E1, E7, E13, E19, E25, F6, F12, F18, F24, F30, G7, G13, G19, G25, K4, K6, K26, K28, K30, M2, M30, N5, N27, R5, T2, T30, U27, V2, V30, W5, Y28, AB2, AB4, AB6, AB26, AB28, AB30, AC5, AD30, AE7, AE13, AE19, AE25, AF6, AF12, AF18, AF24, AF30, AG7, AG13, AG19, AG25, AH6, AH12, AH18, AH24, AH30, AJ1, AJ7, AJ13, AJ19, AJ25, AK6, AK12, AK18, AL29 Power Analog Device Ground. Common return for all power. |
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