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REG113 Datasheet(PDF) 8 Page - Texas Instruments |
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REG113 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 16 page  REG113 8 SBVS031D www.ti.com BASIC OPERATION The REG113 series of LDO (low dropout) linear regulators offers a wide selection of fixed output voltage versions and an adjustable output version. The REG113 belongs to a family of new generation LDO regulators that use a DMOS pass transistor to achieve ultra low-dropout performance and freedom from output capacitor constraints. Ground pin current remains under 1mA over all line, load, and tempera- ture conditions. All versions have thermal and over-current protection, including foldback current limit. The REG113 does not require an output capacitor for regulator stability and is stable over most output currents and with almost any value and type of output capacitor up to 10 µF or more. For applications where the regulator output current drops below several milliamps, stability can be enhanced by adding a 1k Ω to 2kΩ load resistor, using capacitance values smaller than 10 µF, or keeping the effec- tive series resistance greater than 0.05 Ω including the capacitor ESR and parasitic resistance in printed circuit board traces, solder joints, and sockets. Although an input capacitor is not required, it is a good standard analog design practice to connect a 0.1 µF low ESR capacitor across the input supply voltage; this is recommended to counteract reactive input sources and improve ripple rejection by reducing input voltage ripple. Figure 1 shows the basic circuit connections for the fixed voltage models. INTERNAL CURRENT LIMIT The REG113 internal current limit has a typical value of 500mA. A foldback feature limits the short-circuit current to a typical short-circuit value of 200mA. A curve of VOUT versus IOUT is given in Figure 2, and in the Typical Charac- teristics section. FIGURE 1. Fixed Voltage Nominal Circuit for the REG113. REG113 Enable V OUT C OUT V IN 0.1 µF C NR 0.01 µF Gnd NR In Out Optional 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 CURRENT LIMIT FOLDBACK 0 50 100 150 200 250 300 350 400 450 500 550 Output Current Limit (mA) V OUT = 3.3V I CL I SC TYPICAL CHARACTERISTICS (Cont.) For all models, at TJ = +25°C and VENABLE = 1.8V, unless otherwise noted. 67 8 9 10 10 µ 1.0 µ 100n 10n 1n V ENABLE (V) I ENABLE vs VENABLE T = +25 °C T = –55 °C T = +125 °C POWER-UP/POWER-DOWN 1s/div V OUT = 3.0V R LOAD = 12Ω ENABLE The Enable pin is active high and compatible with standard TTL-CMOS levels. Inputs below 0.5V (max) turn the regula- tor off and all circuitry is disabled. Under this condition, ground pin current drops to approximately 10nA. When not used, the Enable pin can be connected to VIN. FIGURE 2. Foldback Current Limit of the REG113-3.3 at 25 °C. |
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