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SM320F28335-EP Datasheet(PDF) 5 Page - Texas Instruments |
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SM320F28335-EP Datasheet(HTML) 5 Page - Texas Instruments |
5 / 167 page SM320F28335-EP www.ti.com SPRS581D – JUNE 2009 – REVISED MAY 2012 List of Figures 2-1 176-Pin PGF/PTP LQFP (Top View) .......................................................................................... 14 2-2 179-Ball GHH MicroStar BGA™ (Upper Left Quadrant) (Bottom View) .................................................. 15 2-3 179-Ball GHH MicroStar BGA™ (Upper Right Quadrant) (Bottom View) ................................................. 16 2-4 179-Ball GHH MicroStar BGA™ (Lower Left Quadrant) (Bottom View) .................................................. 17 2-5 179-Ball GHH MicroStar BGA ™(Lower Right Quadrant) (Bottom View) ................................................. 18 2-6 176-Ball GJZ Plastic BGA (Upper Left Quadrant) (Bottom View) .......................................................... 19 2-7 176-Ball GJZ Plastic BGA (Upper Right Quadrant) (Bottom View) ........................................................ 20 2-8 176-Ball GJZ Plastic BGA (Lower Left Quadrant) (Bottom View) .......................................................... 21 2-9 176-Ball GJZ Plastic BGA (Lower Right Quadrant) (Bottom View) ........................................................ 21 3-1 Functional Block Diagram ...................................................................................................... 31 3-2 Memory Map ...................................................................................................................... 33 3-3 External and PIE Interrupt Sources ............................................................................................ 46 3-4 External Interrupts ................................................................................................................ 46 3-5 Multiplexing of Interrupts Using the PIE Block ............................................................................... 47 3-6 Clock and Reset Domains ...................................................................................................... 50 3-7 OSC and PLL Block Diagram ................................................................................................... 51 3-8 Using a 3.3-V External Oscillator ............................................................................................... 52 3-9 Using a 1.9-V External Oscillator ............................................................................................... 52 3-10 Using the Internal Oscillator .................................................................................................... 52 3-11 Watchdog Module ................................................................................................................ 54 4-1 DMA Functional Block Diagram ................................................................................................ 57 4-2 CPU-Timers ....................................................................................................................... 58 4-3 CPU-Timer Interrupt Signals and Output Signal ............................................................................. 58 4-4 Multiple PWM Modules .......................................................................................................... 60 4-5 ePWM Submodules Showing Critical Internal Signal Interconnections ................................................... 63 4-6 eCAP Functional Block Diagram ............................................................................................... 67 4-7 eQEP Functional Block Diagram ............................................................................................... 68 4-8 Block Diagram of the ADC Module ............................................................................................ 71 4-9 ADC Pin Connections With Internal Reference .............................................................................. 72 4-10 ADC Pin Connections With External Reference ............................................................................. 73 4-11 McBSP Module .................................................................................................................. 76 4-12 eCAN Block Diagram and Interface Circuit ................................................................................... 79 4-13 eCAN-A Memory Map ........................................................................................................... 80 4-14 eCAN-B Memory Map ........................................................................................................... 81 4-15 Serial Communications Interface (SCI) Module Block Diagram ............................................................ 85 4-16 SPI Module Block Diagram (Slave Mode) .................................................................................... 88 4-17 I2C Peripheral Module Interfaces .............................................................................................. 89 4-18 GPIO MUX Block Diagram ...................................................................................................... 91 4-19 Qualification Using Sampling Window ......................................................................................... 96 4-20 External Interface Block Diagram .............................................................................................. 97 4-21 Typical 16-bit Data Bus XINTF Connections ................................................................................. 98 4-22 Typical 32-bit Data Bus XINTF Connections ................................................................................. 98 6-1 SM320F28335 Operating Life Derating Chart .............................................................................. 100 6-2 Typical Operational Current Versus Frequency ............................................................................ 105 6-3 Typical Operational Power Versus Frequency ............................................................................. 105 6-4 Emulator Connection Without Signal Buffering for the DSP .............................................................. 106 6-5 3.3-V Test Load Circuit ......................................................................................................... 107 Copyright © 2009–2012, Texas Instruments Incorporated List of Figures 5 |
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