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A1335 Datasheet(PDF) 5 Page - Allegro MicroSystems |
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A1335 Datasheet(HTML) 5 Page - Allegro MicroSystems |
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5 / 29 page  Precision Hall-Effect Angle Sensor IC with I2C, SPI, and SENT Interfaces A1335 5 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com Continued on the next page… OPERATING CHARACTERISTICS: Valid throughout full operating voltage and ambient temperature ranges, unless other- wise specified Characteristic Symbol Test Conditions Min. Typ.1 Max. Unit2 Electrical Characteristics Supply Voltage VCC 4.5 5 5.5 V Supply Current ICC – 15 20 mA VCC Low Flag Threshold VCCLOW(TH) 4.4 4.55 4.75 V Supply Zener Clamp Voltage VZSUP IZCC = ICC + 3 mA, TA = 25°C 26.5 – – V Reverse Battery Voltage VRCC IRCC = –3 mA, TA = 25°C – – –18 V Power-On Time3,4 tPO TA = 25°C 2 – 40 ms SPI Interface Specifications5 Digital Input High Voltage3 VIH MOSI, SCLK, ¯C¯¯S¯ pins 2.8 – 3.63 V Digital Input Low Voltage3 VIL MOSI, SCLK, ¯C¯¯S¯ pins – – 0.5 V SPI Output High Voltage VOH MISO pins, TA = 25°C 2.93 3.3 3.69 V SPI Output Low Voltage VOL MISO pins – 0.3 – V SPI Clock Frequency3 fSCLK MISO pins, CL = 50 pF 0.1 – 10 MHz Chip Select to First SCLK Edge3 tCS Time from¯C¯¯S¯ going low to SCLK falling edge 50 – – ns Data Output Valid Time3 tDAV Data output valid after SCLK falling edge – 45 – ns MOSI Setup Time3 tSU Input setup time before SCLK rising edge 10 – – ns MOSI Hold Time3 tHD Input hold time after SCLK rising edge 50 – – ns SCLK to ¯C¯¯S¯ Hold Time3 tCHD Hold SCLK high time before¯C¯¯S¯ rising edge 5 – – ns Load Capacitance3 CL Loading on digital output (MISO) pin – – 50 pF I2C Interface Specifications (VPU = 3.3 V on SDA and SCL pins) Bus Free Time Between Stop and Start3 tBUF 1.3 – – µs Hold Time Start Condition3 tHD(STA) 0.6 – – µs Setup Time for Repeated Start Condition3 tSU(STA) 0.6 – – µs SCL Low Time3 tLOW 1.3 – – µs SCL High Time3 tHIGH 0.6 – – µs Data Setup Time3 tSU(DAT) 100 – – ns Data Hold Time3 tHD(DAT) 0 – 900 ns Setup Time for Stop Condition3 tSU(STO) 0.6 – – µs Logic Input Low Level (SDA and SCL pins)13 VIL(I2C) – – 0.9 V Logic Input High Level (SDA and SCL pins) VIH(I2C) 2.1 – 3.63 V |
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