Microstepping DMOS Driver with Translator

A5977

10

Allegro MicroSystems, LLC

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

www.allegromicro.com

Charge Pump (CP1 and CP2)

The charge pump is used to generate a gate supply greater than

capacitor is required between CP1 and CP2, and a 0.22 µF

ceramic capacitor is required between VCP and VBB. VCP is

internally monitored, and in the case of a fault condition, the

outputs of the device are disabled.

VREG

This internally generated voltage is used to operate the sink-side

DMOS gates. The VREG terminal should be decoupled with

a 0.22 µF capacitor to ground. VREG is internally monitored,

and in the case of a fault condition, the outputs of the device are

disabled.

Shutdown

In the event of a fault (excessive junction temperature, or low

voltage on VCP or VREG), the outputs of the device are dis-

abled until the fault condition is removed. At power-up, and in

disables the drivers and resets the translator to the home position.

Overcurrent Protection (OCP)

side OCP to function and the OCP threshold is independent of the