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FEDL7037-003-02 Datasheet(PDF) 1 Page - LAPIS Semiconductor Co., Ltd. |
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FEDL7037-003-02 Datasheet(HTML) 1 Page - LAPIS Semiconductor Co., Ltd. |
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1 / 87 page  FEDL7037-003-03 Issue Date:Aug. 09, 2010 ML7037-003 Dual Echo Canceler & Noise Canceler with Dual Codec for Hands-Free 1/87 GENERAL DESCRIPTION The ML7037-003 is an IC device developed for portable, handsfree communication with built-in line echo canceler, acoustic echo canceler, and transmission signal noise canceler. Built-in to the voice signal interface is a PCM CODEC for the analog interface on the acoustic-side, and another PCM CODEC for the analog interface on the line-side. On the line-side, in addition to the analog interface, there is also a -law PCM/16-bit linear digital interface. Equipped with gain and mute controls for data transmission and reception, a -law PCM/16-bit linear digital interface for memo recording and message output, and transfer clock and sync clock generators for digital communication, this device is ideally suited for a handsfree system. FEATURES • Single 3.3 V Power Supply Operation (3.0 to 3.6 V) [with built-in regulator to generate internal power supply] • Built-in 2-channel (line and acoustic) echo canceler Echo attenuation : 35 dB (typ.) for white noise Cancelable echo delay time : Single echo canceler mode (only an acoustic echo canceler is enabled) Tacoud= 64 ms (max) Dual echo canceler mode (both of an acoustic and line echo cancelers are enabled) Tacoud = 64 ms Tlined = 20 ms • Built-in transmission signal noise canceler Noise attenuation : 13 dB (typ.) for white noise • Built-in 2-channel CODEC’s • Analog input gain amp’s (Acoustic side = 2 stages; Line-side = 1 stage) • Analog output configuration: Push-pull drive (can drive a 2.0 k load) • Receive-side ALC (Auto Level Controler) • Programmable Gain/Mute • A slope filter on transmit side • 16 GPI’s and 8 GPO’s • Speech digital interface coding formats : µ-law PCM (G.711 [64kbps]), 16-bit linear (2's complement) • Speech digital interface sync formats : Long-frame-sync, short-frame-sync • PCM shift clocks (BCLK) Clock slave mode : 64kHz to 2.048MHz (µ-law PCM) / 128kHz to 2.048MHz (16bit Linear PCM) Clock master mode : 64kHz (µ-law PCM) / 128kHz (16bit Linear PCM) • Master clock frequency : 12.288 MHz (crystal unit the ML7037’s built-in driving circuit for a crystal unit or a crystal oscillator) • Transmission signal equalizer • Package : 64-pin plastic TQFP (TQFP64-P-1010-0.50-K) (ML7037-003TB) |
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