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FEDL7041-01 Datasheet(PDF) 10 Page - LAPIS Semiconductor Co., Ltd. |
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FEDL7041-01 Datasheet(HTML) 10 Page - LAPIS Semiconductor Co., Ltd. |
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10 / 28 page  FEDL7041-05 ML7041 10/28 Table 1 shows the register map. Table 1 Control Register Map Address Control and Detect Data Name A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0 RW CR0 0 0 0 A/ SEL SPOUT PON PDN ALL PDN TX PDN RX SLP SLP SEL LNR R/W CR1 0 0 1 MIC SEL1 MIC SEL0 SP SEL1 SP SEL0 SHORT FRAME — SW C/A RX PAD R/W CR2 0 1 0 TX ON/OFF TX GAIN2 TX GAIN1 TX GAIN0 RX ON/OFF RX GAIN2 RX GAIN1 RX GAIN0 R/W CR3 0 1 1 SIDE TONE GAIN2 SIDE TONE GAIN1 SIDE TONE GAIN0 TONE ON/OFF TONE GAIN3 TONE GAIN2 TONE GAIN1 TONE GAIN0 R/W CR4 1 0 0 DTMF/ OTHERS SEL TONE SEND — TONE4 TONE3 TONE2 TONE1 TONE0 R/W CR5 1 0 1 GP1 SEL CR/TONE — RG2PDN RG1PDN GP4C GP3C GP2C GP1C R/W CR6 1 1 0 VOX ON/OFF ON LVL1 — — — — — — R/W CR7 1 1 1 VOX OUT TX NOISE1 TX NOISE0 — — — — — R R/W: Read/Write enable R: Read only register |
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