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ML7406 Datasheet(PDF) 11 Page - LAPIS Semiconductor Co., Ltd. |
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ML7406 Datasheet(HTML) 11 Page - LAPIS Semiconductor Co., Ltd. |
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11 / 104 page  FEDL7406-02 ML7406 11/104 ●Recommended Operation Conditions Item Symbol Condition Min Typ Max Unit Power Supply (I/O) VDDIO VDDIO pin and VDD_REG pin (*1) 1.8 3.3 3.6 V VDD_PA pin TX power 1mW mode 1.8 3.3 3.6 V VDD_PA pin TX Power 10mW mode 2.3 3.3 3.6 V Power Supply (PA) VDDPA VDD_PA pin TX Power 20mW mode 2.6 3.3 3.6 V Operational Temperature Ta − -40 +25 +85 ˚C Digital Input Rising Time TIR Digital Input pins (*1) − − 20 ns Digital InputFalling Time TIF Digital Input pins (*1) − − 20 ns Digital Output Output Load CDL All Digital Output pins − − 20 pF Master Clock Frequency (XIN,XOUT,TCXO,SPXO pins) FMCK1 − (*2) 26 (*2) MHz Master Clock Accuracy (*2) ACMCK1 − -85 − +85 ppm TCXO Input Voltage VTCXO DC Cutoff TCXO Optionis selected 0.8 − 1.5 Vpp SPI Clock InputFrequency FSCLK SCLK pin 0.032 2 16 MHz SPI Clock Input Duty Cycle Ratio DSCLK SCLK pin 45 50 55 % RF Frequency FRF 750 − 960 MHz *1 In the pin description, I or Is are specified as the I/O. *2 Indicating frequency deviation during TX-RX operation. In order to support various standards, please apply the frequency accuracy for each standard to meet the requirements. Specification Required accuracy Wireless M-Bus S mode ±60 ppm(Meter) ±25 ppm(Other) Wireless M-Bus T mode ±60 ppm(Meter) ±25 ppm(Other) Wireless M-Bus C mode ±25 ppm ARIB STD-T108 ±20 ppm |
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