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ML7406 Datasheet(PDF) 5 Page - LAPIS Semiconductor Co., Ltd. |
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ML7406 Datasheet(HTML) 5 Page - LAPIS Semiconductor Co., Ltd. |
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5 / 104 page  FEDL7406-02 ML7406 5/104 ■Block Diagram LNA MIX BPF Limiter PA LO PLL VCO RF L C ML7406 S P I PHY RSSI FIFO REG_OUT REG_CORE XIN XOUT I R C BB SCLK SDO SDI SCEN GPIO0 VBG RESETN A_MON LNA_P PA_OUT Reg(PA) Reg REG_PA REGPDIN VB_EXT LP IND1,2 ED_VAL DEMOD RF_Manager Digital MOD FMAP Wakeup TIMER GPIO1/2/3 General TIMER1/2 EXT_CLK 20mW/ 1mW RC OSC TEMP CLK CAL 26MHz Xtal OSC |
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