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CDK8307EITQ80 Datasheet(PDF) 8 Page - Exar Corporation |
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CDK8307EITQ80 Datasheet(HTML) 8 Page - Exar Corporation |
8 / 31 page Data Sheet ©2009-2013 Exar Corporation 8/31 Rev 1C Pin Assignments - TQFP (Continued) Pin No. Pin Name Description 41 FCLKP LVDS frame clock (1x), positive output 42 FCLKN LVDS frame clock (1x), negative output 45 RESETN Reset SPI interface 61 TP Test pin. Leave open (un-connected) or connect to GND. 62, 64, 66, 67, 69 NC Not connected 65 VCM Common mode output pin, 0.5 AVDD 71 CLKP Positive differential input clock 72 CLKN Negative differential input clock. 75 OVDD Digital CMOS inputs supply voltage (1.7V to 3.6V) 76 CSN Chip select enable. Active low. 77 SDATA Serial data input 78 SCLK Serial clock input |
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