TRF4400

SINGLE-CHIP 433-MHz RF TRANSMITTER

SLWS113C –NOVEMBER 2000 – REVISED SEPTEMBER 2001

10

POST OFFICE BOX 655303

TRF4400 direct digital synthesizer implementation (continued)

Note that the frequencies

transmitting FSK,

should be set to the same

demodulation.

For the case of low-side injection, the receiver LO would be set to

injection, the receiver LO would be set to

Since the DDS registers are static, preprogrammed values are retained during standby mode. This feature

greatly reduces turnon time, reduces current consumption when coming out of standby mode, and enables very

fast lock-times. The PLL lock-times ultimately determine when data can be transmitted or received.

phase-locked loop

The phase-locked loop (PLL) of the TRF4400 consists of a phase detector (PD) and a frequency acquisiton aid

(FD) (including two charge pumps), an external loop filter, voltage-controlled oscillator (VCO), and a

programmable fixed prescaler (N-divider) in the feedback loop (see Figure 7).

The PLL as implemented in the TRF4400 multiplies the DDS output frequency and further suppresses the

unwanted spurious signals produced by the direct digital synthesizer.

External

Loop Filter

VCO

N-Divider

256 / 512

IPD_1

IPD_2

PD

FD

4, 5

1

24

DDS

Figure 7. Basic PLL Structure

VCO

A modified Colpitts oscillator architecture with an external resonant circuit is used for the TRF4400. The internal

bias current network adjusts the signal amplitude of the VCO. This allows a wide range of Q-factors (30

…60)

for the external tank circuit.

The VCO can be bypassed by applying an external RF signal at VCO_TANK2, terminal 5. To drive the internal

PLL and power amplifier, a typical level of –10 dBm should be applied. When an external VCO is used, the

x_VCO bit should be set to 0.

phase detector and charge pumps

The TRF4400 contains two charge pumps for locking to the desired frequency: one for coarse tuning of the

frequency differences (called the frequency acquisition aid), and one for fine tuning of the phase differences

(used in conjunction with the phase detector).

The XOR phase detector and charge pumps produce a mean output current that is proportional to the phase

difference between the reference frequency and the VCO frequency divided by N; N = 256 or 512. The TRF4400

An additional slip detector and acquisition aid charge pump generates current pulses at terminal PD_OUT2

during the lock-in of the PLL. This charge pump is turned off when the PLL locks in order to reduce current

(APLL) in the C-word.