CDMA IF VGAs and I/Q Demodulators

with VCO and Synthesizer

10

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M

S

B

Table 1. MAX2306 Control Register States

PINS

X

L

Shutdown pin completely

powers down the chip

SHUTDOWN

ACTION

RESULT

OPERATIONAL

MODE

X

X

X

X

X

X

X

X

X

X

ML

S

CONTROL REGISTER

S

BB

X

X

X

X

X

X

H

X

0 in shutdown register bit leaves

serial port active

SHUTDOWN

X

X

X

X

X

X

X

0

X

X

X

0

X

H

X

0 in standby register bit turns off

VGA and modulator only

STANDBY

X

X

1

0

0

H

H

Mode pin overrides VCO_SEL,

DIVSEL, and IN_SEL to high

CDMA

X

X

X

X

X

1

X

1

0

F

H

Floating mode pin returns control

to register

CDMA

1

1

X

X

1

1

X

1

0

L

H

Mode pin overrides VCO_SEL,

DIVSEL, and IN_SEL to low

FM_IQ

X

X

X

X

X

1

0

1

0

F

H

Floating mode pin returns control

to register

FM_IQ

X

X

0

1

0

1

0

L

H

Mode pin overrides VCO_SEL,

DIVSEL, and IN_SEL to low

FM_I

X

X

X

X

X

1

1

1

0

F

H

L

Floating pins return control to

register

FM_I

X

X

0

1

1

1

Note: H = high, L = low, F = floating pin, X = don’t care, Blank = independent parameter, 1 = logic high, 0 = logic low.

The appropriate latch outputs provide I and Q signals

at the desired LO frequency.

Synthesizer

The VCO’s output frequency is controlled by an internal

phase-locked-loop (PLL) dual-modulus synthesizer. The

loop filter is off-chip to simplify loop design for emerg-

ing applications. The tunable resonant network is also

off-chip for maximum Q and for system design flexibili-

ty. The VCO output frequency is divided down to the

desired comparison frequency with the M counter. The

M counter consists of a 4-bit A swallow counter and a

10-bit P counter. A reference signal is provided from an

external source and is divided down to the comparison

frequency with the R counter. The two divided signals

are compared with a three-state digital phase-frequen-

cy detector. The phase-detector output drives a

charge-pump as well as lock-detect logic and tur-

bocharge control logic. The charge-pump output

(CP_OUT) pin is processed by the loop filter and drives

the tunable resonant network, altering the VCO frequen-

cy and closing the loop.

Multimode applications are supported by two indepen-

dent programmable registers each for the M counter

(M1, M2), the R counter (R1, R2), and the charge-pump

output current magnitude (CP1, CP2). The DIVSEL (DS)

bit selects which set of registers is used. It can be over-

ridden by the MAX2306’s MODE pin or the MAX2309’s

DIVSEL pin. Programming these registers is discussed

in the 3-Wire Interface and Registers section.