NB3N1900K

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10

Table 12. ELECTRICAL CHARACTERISTICS − CURRENT CONSUMPTION

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Operating Supply Current (Note 19)

All outputs active @ 100.00 MHz,

550

mA

Powerdown Current (Note 19)

All differential pairs tri−stated

36

mA

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

19. Guaranteed by design and characterization, not tested in production.

Table 13. ELECTRICAL CHARACTERISTICS − SKEW AND DIFFERENTIAL JITTER PARAMETERS

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

CLK_IN, DIF[x:0]

(Notes 20, 21, 23, 24 and 27)

Input−to−Output Skew in PLL mode nominal

value @ 25

°C, 3.3 V

−100

100

ps

CLK_IN, DIF[x:0]

(Notes 20, 21, 22, 24 and 27)

Input−to−Output Skew in Bypass mode

nominal value @ 25

°C, 3.3 V

2.5

4.5

ns

CLK_IN, DIF[x:0]

(Notes 20, 21, 22, 24 and 27)

Input−to−Output Skew Variation in PLL mode

across voltage and temperature

|100|

ps

CLK_IN, DIF[x:0]

(Notes 20, 21, 22, 24 and 27)

Input−to−Output Skew Variation in Bypass

mode across voltage and temperature

−250

250

ps

Output−to−Output Skew across all outputs

(Common to Bypass and PLL mode)

65

ps

PLL Jitter Peaking

(Notes 26 and 27)

HBW_BYP_LBW# = 1

0

2.5

dB

PLL Jitter Peaking

(Notes 26 and 27)

HBW_BYP_LBW# =

0

0

2

dB

PLL Bandwidth (Notes 27 and 28)

HBW_BYP_LBW# = 1

2

4

MHz

PLL Bandwidth (Notes 27 and 28)

HBW_BYP_LBW# =

0

0.7

1.4

MHz

Duty Cycle (Notes 20 and 27)

Measured differentially, PLL Mode

45

50

55

%

Duty Cycle Distortion

(Notes 20 and 29)

Measured differentially, Bypass Mode

@ 100.00 MHz

−2

0

2

%

Jitter, Cycle to cycle

(Notes 20, 27 and 30)

PLL mode

50

ps

Additive Jitter in Bypass Mode

50

ps

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

20. Measured into fixed 2 pF load cap. Input to output skew is measured at the first output edge following the corresponding input.

21. Measured from differential cross−point to differential cross−point. This parameter can be tuned with external feedback path, if present.

22. All Bypass Mode Input−to−Output specs refer to the timing between an input edge and the specific output edge created by it.

23. This parameter is deterministic for a given device.

24. Measured with scope averaging on to find mean value. CLK_IN slew rate must be matched to DIF output slew rate.

25. t is the period of the input clock.

26. Measured as maximum pass band gain. At frequencies within the loop BW, highest point of magnification is called PLL jitter peaking.

27. Guaranteed by design and characterization, not tested in production.

28. Measured at 3 db down or half power point.

29. Duty cycle distortion is the difference in duty cycle between the output and the input clock when the device is operated in bypass mode.

@ 100.00 MHz.

30. Measured from differential waveform.