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LM2402 Datasheet(PDF) 5 Page - National Semiconductor (TI) |
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LM2402 Datasheet(HTML) 5 Page - National Semiconductor (TI) |
5 / 11 page Application Hints (Continued) mance of the device in the NSC application board. The val- ues shown in Figure 9 can be used as a good starting point for the evaluation of the LM2402. Effect of Load Capacitance The output rise and fall times as well as overshoot will vary as the load capacitance varies. The values of the output cir- cuit (R1, R2 and L1 in Figure 9) should be chosen based on the nominal load capacitance. Once this is done the perfor- mance of the design can be checked by varying the load based on what the expected variation will be during produc- tion. Effect of Offset Figure 7 shows the variation in rise and fall times when the output offset of the device is varied from 40 to 50 V DC. The rise and fall times show about the same overall variation. The slightly faster fall time is fastest near the center point of 45V, making this the optimum operating point since there is little increase in the rise time. THERMAL CONSIDERATIONS Figure 4 shows the performance of the LM2402 in the test circuit shown in Figure 2 as a function of case temperature. Figure 4 shows that both the rise and fall times of the LM2402 become slightly slower as the case temperature in- creases from 40˚C to 125˚C. In addition to exceeding the safe operating temperature, the rise and fall times will typi- cally exceed 3 nsec. Please note that the LM2402 is never to be operated over a case temperature of 100˚C. Figure 6 shows the total power dissipation of the LM2402 vs. Frequency when all three channels of the device are driving both an 8 pF load and a 20 pF load. This graph gives the de- signer the information needed to determine the heat sink re- quirement for his application. The designer should note that if the load capacitance is increased the AC component of the total power dissipation will also increase as shown in Figure 6. The designer should also remember that the actual video signal has a period of around 70% to 75%. The remainder of the time the video signal is inactive, or at the black level (be- low the black level if blanked). During this time the LM2402 will be at the black level, or below, dissipating under 4W. Re- ferring to Figure 14 and using an input black level voltage of 1.9V, the power dissipation during the inactive video time is 3.8W, including both the 80V and 12V supplies. The LM2402 case temperature must be maintained below 100˚C. Assume the worst case operating condition is a 100 MHz square wave during active video (a pixel clock of 200 MHz with one pixel on, one pixel off). From Figure 6 one can see that the power dissipation of the LM2402 is 28W if the 100 MHz square wave is applied all the time. One must also compensate for the inactive period of video. From Fig- ure 14 it has been calculated that the power dissipation dur- ing the inactive video is 4W. Therefore there is an additional 24W of power dissipation due to the AC signal. Assume that the AC signal is active 72% of the time. Now the AC power dissipation is: 24W x 0.72 = 17W The total power dissipation for 72% active video time is: 17W+4W = 21W If the maximum expected ambient temperature is 50˚C and using the maximum power dissipation of 21W (video being active only 72% of the frame), then a maximum heat sink thermal resistance can be calculated: This example assumes a capacitive load of 8 pF and no re- sistive load. TYPICAL APPLICATION A typical application of the LM2402 is shown in Figure 10. Used in conjunction with three LM2202s, a complete video channel from monitor input to CRT cathode can be achieved. Performance is excellent for resolutions up to 1600 x 1200 and pixel clock frequencies at 200 MHz. Figure 10 is the schematic for the NSC demonstration board that can be used to evaluate the LM2202/2402 combination in a monitor. PC Board Layout Considerations For optimum performance, an adequate ground plane, isola- tion between channels, good supply bypassing and minimiz- ing unwanted feedback are necessary. Also, the length of the signal traces from the preamplifier to the LM2402 and from the LM2402 to the CRT cathode should be as short as pos- sible. The red video trace from the buffer transistor to the LM2402 input is about the absolute maximum length one should consider on a PCB layout. If possible the traces should actually be shorter than the red video trace. The fol- lowing references are recommended for video board design- ers: Ott, Henry W., “Noise Reduction Techniques in Electronic Systems”, John Wiley & Sons, New York, 1976. “Guide to CRT Video Design”, National Semiconductor Appli- cation Note 861. “Video Amplifier Design for Computer Monitors”, National Semiconductor Application Note 1013. Pease, Robert A., “Troubleshooting Analog Circuits”, Butterworth-Heinemann, 1991. Because of its high small signal bandwidth, the part may os- cillate in a monitor if feedback occurs around the video chan- nel through the chassis wiring. To prevent this, leads to the video amplifier input circuit should be shielded, and input cir- cuit wiring should be spaced as far as possible from output circuit wiring. NSC Demonstration Board Figures 11, 12 show routing and component placement on the NSC LM2202/2402 demonstration board. The schematic of the board is shown in Figure 10. This board provides a good example of a layout that can be used as a guide for fu- ture layouts. Note the location of the following components: • C47 -V CC bypass capacitor, located very close to pin 6 and ground pins. ( Figure 12) • C49 -V BB bypass capacitor, located close to pin 10 and ground. ( Figure 12) • C46 and C77 -V CC bypass capacitors, near LM2402 and V CC clamp diodes. Very important for arc protection. (Fig- ure 11) The routing of the LM2402 outputs to the CRT is very critical to achieving optimum performance. Figure 13 shows the routing and component placement from pin 1 to the blue cathode. Note that the components are placed so that they almost line up from the output pin of the LM2402 to the blue www.national.com 5 |
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