© Semiconductor Components Industries, LLC, 2007

September, 2007 - Rev. 3

1

Publication Order Number:

NB4N507A/D

NB4N507A

3.3V/5V, 50 MHz to 200 MHz

PECL Clock Synthesizer

Description

The NB4N507A is a precision clock synthesizer which generates a

very low jitter differential PECL output clock. It produces a clock

output based on an integer multiple of an input reference frequency.

The NB4N507A accepts a standard fundamental mode crystal,

using Phase-Locked-Loop (PLL) techniques, will produce output

clocks up to 200 MHz. In addition, the PLL circuitry will produce a

50% duty cycle square-wave clock output (see Figure 7).

The NB4N507A can be programmed to generate a selection of input

reference frequency multiples. An exact 155.52 MHz output clock can

be generated from a 19.44 MHz crystal and the x8 multiplier selection.

The NB4N507A is intended for low output jitter clock generation.

The PECL outputs are 15 mA open collector and must be DC loaded

and AC terminated. See Figures 4 and 6.

Features

Figure 1. Simplified Logic Block Diagram

Osc

PD

CP

VCO

PECL

Mult

S1

S0

CLKOUT

CLKOUT

OE

*For additional information on our Pb-Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

SOIC-16

D SUFFIX

CASE 751B

See detailed ordering and shipping information in the package

dimensions section on page 6 of this data sheet.

ORDERING INFORMATION

MARKING DIAGRAM

http://onsemi.com

NB4N507AG

AWLYWW

A

= Assembly Location

WL

= Wafer Lot

Y

= Year

WW

= Work Week

G

= Pb-Free Package