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NB6N239S Datasheet(PDF) 1 Page - ON Semiconductor

Part # NB6N239S
Description  3.3 V, 3.0 GHz Any Differential Clock IN to LVDS OUT Clock Divider
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NB6N239S Datasheet(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2013
January, 2013 − Rev. 6
1
Publication Order Number:
NB6N239S/D
NB6N239S
3.3 V, 3.0 GHz Any
Differential Clock IN to
LVDS OUT ÷1/2/4/8, ÷2/4/8/16
Clock Divider
Description
The NB6N239S is a high−speed, low skew clock divider with two
divider circuits, each having selectable clock divide ratios;
B1/2/4/8
and
B2/4/8/16. Both divider circuits drive LVDS compatible outputs.
(More device information on page 7). The NB6N239S is a member
of the ECLinPS MAX
™ family of high performance clock products.
Features
Maximum Clock Input Frequency, 3.0 GHz (1.5 GHz with B1)
Input Compatibility with LVDS/LVPECL/CML/HSTL/HCSL
Rise/Fall Time 120 ps Typical
< 5 ps Typical Within Device Output Skew
Example; 622.08 MHz Input Generates 38.88 MHz to 622.08 MHz
Outputs
Internal 50 W Termination Provided
Random Clock Jitter < 2 ps RMS
QA B1 Edge Aligned to QB Bn Edge
Operating Range: VCC = 3.0 V to 3.465 V with GND = 0 V
Master Reset for Synchronization of Multiple Chips
VBBAC Reference Output
Synchronous Output Enable/Disable
TIA/EIA − 644 Compliant
These Devices are Pb−Free and are RoHS Compliant
CLK
CLK
EN
Figure 1. Simplified Logic Diagram
QB
QB
MR
QA
QA
SELB1
SELB0
SELA1
SELA0
VT
+
B1
B2
B4
B8
B2
B4
B8
B16
A
B
50 W
R
50 W
VBBAC
MARKING DIAGRAM*
QFN−16
MN SUFFIX
CASE 485G
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
Bottom View
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
(Note: Microdot may be in either location)
1
16
NB6N
239S
ALYWG
G
1


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