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HV9985QP-G Datasheet(PDF) 6 Page - Supertex, Inc |
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HV9985QP-G Datasheet(HTML) 6 Page - Supertex, Inc |
6 / 16 page 6 HV9985 Supertex inc. www.supertex.com Doc.# DSFP-HV9985 C051513 Functional Description Power Topology The HV9985 is a three-channel, switch-mode converter LED driver designed to control a boost, a buck or a SEPIC con- verter in a constant frequency, peak current controlled mode. The IC includes an internal linear regulator, which operates from input voltages 10 to 40V. The IC can also be powered directly using the VDD pins and bypassing the internal linear regulator. The IC includes features typically required in LED drivers like open LED protection, output short circuit protec- tion, linear and PWM dimming, and accurate control of the LED current. The IC is ideally suited for backlight applica- tion using either RGB or multi-channel white LED configura- tions. Power Supply to the IC (VIN, VDD, VDD1-3) The HV9985 can be powered directly from its VIN pin that takes a voltage up to 40V. When a voltage is applied at the VIN pin, the HV9985 tries to maintain a constant 5.0V (typ.) at the VDD pin. The regulator also has a built in under-volt- age lockout which shuts the IC off if the voltage at the VDD pin falls below the UVLO threshold. By connecting this VDD pin to the individual VDD pins of the three channels, the internal regulator can be used to power all three channels in the IC. In case the internal regulator is not utilized, an external pow- er supply (5.0V +/- 10%) can be used to power the IC. In this case, the power supply is directly connected to the VDD pins and the VIN pin. All four VDD pins must by bypassed by a low ESR capaci- tor (≥0.1μF) to provide a low impedance path for the high frequency current of the output gate driver. These capaci- tors must be referenced to the individual grounds for proper noise rejection (see Layout Guidelines section for more in- formation). Also, in all cases, the four VDD pins must be con- nected together externally. The input current drawn from the external power supply (or VIN pin) is a sum of the 1.0mA (max) current drawn by the all the internal circuitry (for all three channels) and the cur- rent drawn by the gate drivers (which in turn depends on the switching frequency and the gate charge of the external FET). I IN = 1mA + (QG1 +QG2 + QG3) • fS In the above equation, f S is the switching frequency of the converters and Q G1-3 are the gate charges of the external FETs (which can be obtained from the FET datasheets). The EN pin is a TTL compatible input used to disable the IC. Pulling the EN pin to GND will shut down the IC and reduce the quiescent current drawn by the IC to be less than 200μA. If the enable function is not required, the EN pin can be con- nected to VDD. Clock Input (CLK) The switching frequency of the converters can be set in one of two ways. One way to set the switching frequency is to use the on-chip oscillator using a resistor at the RT pin. In this case, the CLK pin should be connected to GND. If the on-chip clock is used, two or more HV9985s cannot be syn- chronized to each other. The other way to is set the switching frequency by using a TTL compatible square wave input at the CLK pin. The switching frequencies of the three converters will be 1/12th the frequency of the external clock. By using the same clock for multiple ICs, all the ICs can be synchronized together. In this case, the RT pin can be either left open or connected to GND. Current Sense (CS1-3) The current sense input is used to sense the source current of the switching FET. Each CS input of the HV9985 includes a built-in 100ns (minimum) blanking time to prevent spurious turn off due to the initial current spike when the FET turns on. The IC includes an internal resistor divider network, which steps down the voltage at the COMP pins by a factor of 9. This voltage is used as the reference for the current sense comparators. Since the maximum voltage of the COMP pin is approximately (V DD –1.0V), this voltage determines the maximum reference current for the current sense compara- tor and thus the maximum inductor current. The current sense resistor R CS should be chosen so that the input inductor current is limited to below the saturation cur- rent level of the input inductor. For discontinuous conduction mode of operation, no slope compensation is necessary. In this case, the current sense resistor is chosen as: R CS = V DD – 1V 9 • I IN,PK where I IN,PK is the maximum desired peak input current. For continuous conduction mode converters operating in the constant frequency mode, slope compensation becomes necessary to ensure stability of the peak current mode con- troller, if the operating duty cycle is greater than 50%. This factor must also be accounted for when determining R CS (see Slope Compensation section). |
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