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OZ6812 Datasheet(PDF) 9 Page - List of Unclassifed Manufacturers |
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OZ6812 Datasheet(HTML) 9 Page - List of Unclassifed Manufacturers |
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9 / 13 page  OZ6812 OZ6812-SF-1.5 Page 9 Pin Number Pin Name Description LQFP BGA Input Type Power Rail Drive IORD#/ CAD13 I/O Read: This output goes active (low) for I/O reads from the OZ6812 to the socket. CardBus Address/Data: In CardBus mode, this pin is the CAD bit 13. 93 G10 TTL I/O Socket _Vcc CardBus spec. IOW#/ CAD15 I/O Write: This output goes active (low) for I/O writes from the OZ6812 to the socket. CardBus Address/Data: In CardBus mode, this pin is the CAD bit 15. 96 F11 TTL I/O Socket _Vcc CardBus spec. WP/ IOIS16#/ CCLKRUN# Write Protect / I/O is 16-Bit: In Memory mode, this input is indicates the status of the write protect switch on the PC Card. In I/O mode, this input indicates the size of current data transfer on the PC Card. CardBus Clock Run: In CardBus mode, this pin is the CCLKRUN# signal, which starts and stops the CardBus CCLK. To enable the CLKRUN# signal, ExCA register 3Bh bit[3:2] must be enabled. 136 A4 TTL I/O-PU Socket _Vcc CardBus spec. INPACK#/ CREQ# Input Acknowledge: The INPACK# function is not applicable in PCI bus environments. This pin is provided for Legacy card compatibility. CardBus Request: In CardBus mode, this pin is the CREQ# signal. 123 C8 - I-PU Socket _Vcc CardBus spec. RDY/IREQ#/ CINT# Ready / Interrupt Request: In Memory mode, this input indicates that the card is ready or busy. In I/O mode, this input indicates a card interrupt request. CardBus Interrupt: In CardBus mode, this pin is the CINT# signal. This signal is active-low and level-sensitive. 132 C6 - I-PU Socket _Vcc CardBus spec. WAIT#/ CSERR# Wait: This pin is driven by the PC Card to delay completion of the current cycle. CardBus System Error: In CardBus mode, this pin is the CSERR# signal. 133 A5 TTL I-PU Socket _Vcc CardBus spec. CD[2:1]/ CCD[2:1]# Card Detect: These inputs indicate a card is present in the socket. They are internally pulled high to AUX_VCC. CardBus Card Detect: In CardBus mode, these inputs are used with CVS[2:1] to detect presence and type of card. 137, 75 C5, K10 TTL I-PU- Schmitt Aux_Vcc CardBus spec. CE2#/ CAD10 Card Enable 2: This pin is driven low to control byte/word card access. CE2# enables odd- numbered address bytes. CardBus Address/Data: In CardBus mode, this pin is the CAD bit 10. 91 G13 TTL I/O Socket _Vcc CardBus spec. CE1#/ CCBE0# Card Enable 1: This pin is driven low to control byte/word card access. CE1# enables even- numbered address bytes. When configured for 8- bit cards, CE1# is active and A0 is used to indicate access of odd- or even-numbered bytes. CardBus Command/Byte Enable: In CardBus mode, this pin is the CCBEO# signal. 88 H13 TTL I/O Socket _Vcc CardBus spec. |
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