P3P623S05A/B, P3P623S09A/B

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Table 8. SWITCHING CHARACTERISTICS

Parameter

Description

Test Conditions

Min

Typ

Max

Units

Input Frequency

20

50

MHz

Output Frequency

30 pF load

20

50

MHz

40

50

60

%

Output Rise Time (Notes 3, 4)

Measured between 0.8 V and 2.0 V

2.5

nS

Output Fall Time (Notes 3, 4)

Measured between 2.0 V and 0.8 V

2.5

nS

Output−to−output skew (Notes 3, 4)

All outputs equally loaded

250

pS

Delay, CLKIN Rising Edge to

CLKOUT Rising Edge (Note 4)

±350

pS

Device−to−Device Skew (Note 4)

CLKOUT pins of the device

700

pS

Cycle−to−cycle jitter (Notes 3, 4)

Loaded outputs

±200

pS

PLL Lock Time (Note 4)

Stable power supply, valid clock

presented on CLKIN pin

1.0

mS

3. All parameters specified with 30 pF loaded outputs.

4. Parameter is guaranteed by design and characterization. Not tested in production.

Switching Waveforms

Figure 4. Duty Cycle Timing

OUTPUT

Figure 5. All Outputs Rise/Fall Time

OUTPUT

0.8V

2V

0.8V

2V

Figure 6. Output−Output Skew

t 5

OUTPUT

OUTPUT