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AT28BV256-25 Datasheet(PDF) 7 Page - ATMEL Corporation |
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AT28BV256-25 Datasheet(HTML) 7 Page - ATMEL Corporation |
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7 / 16 page  7 0273J–PEEPR–10/06 AT28BV256 10. AC Read Waveforms(1)(2)(3)(4) Notes: 1. CE may be delayed up to t ACC - tCE after the address transition without impact on tACC. 2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE or by tACC - tOE after an address change without impact on tACC. 3. t DF is specified from OE or CE whichever occurs first (CL = 5 pF). 4. This parameter is characterized and is not 100% tested. 9. AC Read Characteristics Symbol Parameter AT28BV256-20 Units Min Max tACC Address to Output Delay 200 ns t CE (1) CE to Output Delay 200 ns tOE (2) OE to Output Delay 0 80 ns tDF (3)(4) CE or OE to Output Float 0 55 ns t OH Output Hold from OE, CE or Address, whichever occurred first 0 ns tCE tOE tDF tOH tACC |
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