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SN72HVD3082E Datasheet(PDF) 5 Page - Texas Instruments |
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SN72HVD3082E Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 21 page  SN65HVD3082E,SN75HVD3082E SN65HVD3085E,SN65HVD3088E SLLS562D − MARCH 2003 − REVISED SEPTEMBER 2005 www.ti.com 5 RECEIVER ELECTRICAL CHARACTERISTICS over recommended operating conditions unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT VIT+ Positive-going input threshold voltage IO = −8 mA −85 −10 mV VIT− Negative-going input threshold voltage IO = 8 mA −200 −115 mV Vhys Hysteresis voltage (VIT+ − VIT−) 30 mV VOH High-level output voltage VID = 200 mV, IOH = −8 mA, See Figure 8 4 4.6 V VOL Low-level output voltage VID = −200 mV, IOH = 8 mA, See Figure 8 0.15 0.4 V IOZ High-impedance-state output current VO = 0 to VCC, RE= VCC −1 1 µA VIH = 12 V, VCC = 5 V 0.04 0.1 II Bus input current VIH = 12 V, VCC = 0 0.06 0.125 mA II Bus input current VIH = −7 V, VCC = 5 V −0.1 −0.04 mA VIH = −7 V, VCC = 0 −0.05 −0.03 IIH High-level input current (RE) VIH = 2 V −60 −30 µA IIL Low-level input current (RE) VIL = 0.8 V −60 −30 µA Cdiff Differential input capacitance VI = 0.4 sin (4E6πt) + 0.5 V, DE at 0 V 7 pF (1) All typical values are at 25°C and with a 5-V supply. RECEIVER SWITCHING CHARACTERISTICS over recommended operating conditions unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH Propagation delay time, low-to-high-level output HVD3082E HVD3085E 75 200 ns tPLH Propagation delay time, low-to-high-level output HVD3088E 100 ns tPHL Propagation delay time, high-to-low-level output RL = 54 Ω, CL = 15 pF, HVD3082E HVD3085E 79 200 ns tPHL Propagation delay time, high-to-low-level output CL = 15 pF, See Figure 9 HVD3088E 100 ns tsk(p) Pulse skew ( |tPHL − tPLH| ) See Figure 9 HVD3082E HVD3085E 4 30 ns tsk(p) Pulse skew ( |tPHL − tPLH| ) HVD3088E 10 ns tr Output signal rise time VID = −1.5 V to 1.5 V, 1.5 3 ns tf Output signal fall time VID = −1.5 V to 1.5 V, CL = 15 pF, See Figure 9 1.8 3 ns HVD3082E 5 50 tPZH Output enable time to high level HVD3082E HVD3085E 5 50 ns tPZH Output enable time to high level HVD3088E 30 ns tPZL Output enable time to low level CL = 15 pF, HVD3082E HVD3085E 10 50 ns tPZL Output enable time to low level CL = 15 pF, DE at 3 V, HVD3088E 30 ns DE at 3 V, See Figure 10 and Figure 11 HVD3082E 5 50 tPHZ Output enable time from high level See Figure 10 and Figure 11 HVD3082E HVD3085E 5 50 ns tPHZ Output enable time from high level HVD3088E 30 ns tPLZ Output enable time from low level HVD3082E HVD3085E 8 50 ns tPLZ Output enable time from low level HVD3088E 30 ns tPZH(SHDN) Propagation delay time, shutdown-to-high-level output CL = 15 pF, DE at 0 V, 1600 3500 ns tPZL(SHDN) Propagation delay time, shutdown-to-low-level output CL = 15 pF, DE at 0 V, See Figure 12 1700 3500 ns |
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