TMS664414, TMS664814, TMS664164

4 194 304 BY 4-BIT/2 097 152 BY 8-BIT/1 048 576 BY 16-BIT BY 4-BANK

SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES

SMOS695A – APRIL 1998 – REVISED JULY 1998

7

POST OFFICE BOX 1443

operation (continued)

COMMAND

STATE OF BANK(S)

CKE

(n – 1)

CKE

(n)

CS

(n)

RAS

(n)

CAS

(n)

W

(n)

MNEMONIC

Self-refresh entry

All banks = deac

H

L

L

L

L

H

SLFR

Power-down entry at n + 1‡

All banks = no

access operation§

H

L

X

X

X

X

PDE

Self refresh exit

All banks =

L

H

L

H

H

H

—

Self-refresh exit

self-refresh

L

H

H

X

X

X

—

Power-down exit¶

All banks =

power down

L

H

X

X

X

X

—

CLK suspend at n + 1

All banks = access

operation§

H

L

X

X

X

X

HOLD

CLK suspend exit at n + 1

All banks = access

operation§

L

H

X

X

X

X

—

† For execution of these commands, A0 – A13 (n) and DQMx (n) are don’t care entries.

‡ On cycle n, the device executes the respective command (listed in Table 1). On cycle (n+1), the device enters the power-down mode.

§ A bank is no longer in an access operation one cycle after the last data-out cycle of a READ (READ-P) operation, and two cycles after the last

data-in cycle of a WRT (WRT-P) operation. Neither the PDE nor the HOLD command is allowed on the cycle immediately following the last data-in

cycle of a WRT (WRT-P) operation.

¶ If setup time from CKE high to the next CLK high satisfies tCESP, the device executes the respective command (listed in Table 1). Otherwise,

either the DESL or NOOP command must be applied before any other command.

Legend:

n

= CLK cycle number

L

= Logic low

H

= Logic high

X

= Don’t care (either logic high or logic low)

deac = Deactivated