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XRT8001IP Datasheet(PDF) 4 Page - Exar Corporation

Part # XRT8001IP
Description  WAN Clock for T1 and E1 Systems
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT8001IP Datasheet(HTML) 4 Page - Exar Corporation

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XRT8001
4
Rev. 1.01
PIN DESCRIPTION (CONT'D)
Pin #
Name
Type
Description
8
MSB
I
Master/Slave Mode Select Input - Setting this input pin “HIGH”
configures the XRT8001 to operate in the “MASTER” Mode. Conversely,
setting this input pin “LOW” configures the XRT8001 to operate in the
“SLAVE” Mode.
9
GND
-
Analog Ground
10
VCC
-
Analog Power Supply
11
LOCKDET
O
Lock Detect Output - This output indicates whether or not the “selected”
internal PLL(s) are “in-lock” or are “out-of-lock”.
By default, this output pin is “high” when both PLLs are in-lock” and will
go toggle “low” if either one of the PLLs is “out-of-lock”.
However, the XRT8001 also permits the user to configure this output pin
to reflect the state of any one of the PLLs within the chip. (See Table 3.)
12
VCC
-
Digital Power Supply
13
CLK2
O
Clock Output 2 - The XRT8001 will drive the desired “synthesized”
signal via this output pin. This output signal will have a 50+5% duty
cycle.
Note: This output pin is tri-stated unless the “CLK1EN” bit-field (within
Command Register CR4) has been set to “1”.
14
GND
-
Digital Ground
15
VCC
-
Digital Power Supply
16
SDI
I
Microprocessor Serial Interface – Serial Data Input
Whenever, the user wishes to read or write data into the Command
Registers, over the Microprocessor Serial Interface, the user is expected
to apply the “Read/Write” bit, the Address Values (of the Command
Registers) and Data Value to be written (during “Write” Operations) to
this pin.
This input will be sampled on the rising edge of the SCLK pin (pin 18).
17
CS
I
Microprocessor Serial Interface – Chip Select Input:
The Local Microprocessor must assert this pin (e.g., set it to “0”) in order
to enable communication with the XRT8001 via the Microprocessor
Serial Interface.
Note: This pin is internally pulled “high”.
18
SCLK
I
Microprocessor Serial Interface-Clock Signal
This signal will be used to sample the data, on the SDI pin, on the rising
edge of this signal.
Additionally, during “Read” operations, the
Microprocessor Serial Interface will update the SDO output on the falling
edge of this signal.


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