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N84C163 Datasheet(PDF) 6 Page - ON Semiconductor |
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N84C163 Datasheet(HTML) 6 Page - ON Semiconductor |
6 / 11 page N84C163 www.onsemi.com 6 Hardware Data Protection The N84C163 is designed with the following hardware data protection features to provide a high degree of data integrity. 1. The N84C163 features a WP pin. When the WP pin is tied high the entire memory array becomes write protected (read only). 2. The VCC sense provides write protection when VCC falls below the reset threshold value (VTH). The VCC lock out inhibits writes to the serial EEPROM whenever VCC falls below (power down) VTH or until VCC reaches the reset threshold (power up) VTH. Any attempt to access the internal EEPROM is not recognized and an ACK will not be sent on the SDA line when RESET or RESET is active. Reset Threshold Voltage The N84C163 is offered with five reset threshold voltage ranges. They are 4.50 ÷ 4.75 V, 4.25 ÷ 4.50 V, 3.00 ÷ 3.15 V, 2.85 ÷ 3.00 V and 2.55 ÷ 2.70 V. Figure 2. Bus Timing tHIGH SCL SDA IN SDA OUT tLOW tF tLOW tR tBUF tSU:STO tSU:DAT tHD:DAT tHD:STA tSU:STA tAA tDH Figure 3. Write Cycle Timing tWR STOP CONDITION START CONDITION ADDRESS ACK 8TH BIT BYTE n SCL SDA Figure 4. Start/Stop Timing START BIT A SD STOP BIT SCL |
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