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QT113 Datasheet(PDF) 6 Page - Quantum Research Group

Part # QT113
Description  CHARGE-TRANSFER TOUCH SENSOR
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Manufacturer  QUANTUM [Quantum Research Group]
Direct Link  http://www.qprox.com
Logo QUANTUM - Quantum Research Group

QT113 Datasheet(HTML) 6 Page - Quantum Research Group

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induce detection ‘cycling’, whereby an object is detected, the
load is turned on, the supply sags, the detection is no longer
sensed, the load is turned off, the supply rises and the object
is reacquired, ad infinitum. To prevent this occurrence, the
output should only be lightly loaded if the device is operated
from an unregulated supply, e.g. batteries. Detection
‘stiction’, the opposite effect, can occur if a load is shed when
Out is active.
The output of the QT113 can directly drive a resistively
limited LED. The LED should be connected with its cathode
to the output and its anode towards Vcc, so that it lights when
the sensor is active. If desired the LED can be connected
from Out to ground, and driven on when the sensor is
inactive.
3 - CIRCUIT GUIDELINES
3.1 SAMPLE CAPACITOR
Charge sampler Cs can be virtually any plastic film or
medium-K ceramic capacitor. The acceptable Cs range is
from 10nF to 500nF depending on the sensitivity required;
larger values of Cs demand higher stability to ensure reliable
sensing. Acceptable capacitor types include PPS film,
polypropylene film, NPO/C0G ceramic, and X7R ceramic.
3.2 OPTION STRAPPING
The option pins Opt1 and Opt2 should never be left floating.
If they are floated, the device will draw excess power and the
options will not be properly read on powerup. Intentionally,
there are no pullup resistors on these lines, since pullup
resistors add to power drain if tied low.
The Gain input should be connected to either Vdd or Gnd.
Tables 1-1 and 2-1 show the option strap configurations
available.
3.4 POWER SUPPLY, PCB LAYOUT
The power supply can range from 2.5 to 5.0 volts. At 3 volts
current drain averages less than 600µA in most cases, but
can be higher if Cs is large. Increasing Cx values will actually
decrease power drain. Operation can be from batteries, but
be cautious about loads causing supply droop (see Output
Drive, Section 2.2.4).
As battery voltage sags with use or fluctuates slowly with
temperature, the QT113 will track and compensate for these
changes automatically with only minor changes in sensitivity.
If the power supply is shared with another electronic system,
care should be taken to assure that the supply is free of
digital spikes, sags, and surges which can adversely affect
the QT113. The QT113 will track slow changes in Vdd, but it
can be affected by rapid voltage steps.
if desired, the supply can be regulated using a conventional
low current regulator, for example CMOS regulators that have
low quiescent currents. Bear in mind that such regulators
generally have very poor transient line and load stability; in
some cases, shunting Vdd to Vss with a 4.7K resistor to
induce a continuous current drain can have a very positive
effect on regulator performance.
Parts placement: The chip should be placed to minimize the
SNS2 trace length to reduce low frequency pickup, and to
reduce stray Cx which degrades gain. The Cs and Rseries
resistors (see Figure 1-1) should be placed as close to the
body of the chip as possible so that the SNS2 trace between
Rseries and the SNS2 pin is very short, thereby reducing the
antenna-like ability of this trace to pick up high frequency
signals and feed them directly into the chip.
For best EMC performance the circuit should be made
entirely with SMT components.
SNS trace routing: Keep the SNS2 electrode trace (and the
electrode itself) away from other signal, power, and ground
traces including over or next to ground planes. Adjacent
switching signals can induce noise onto the sensing signal;
lQ
6
R1.05/0405
Figure 2-4
Using a micro to obtain HB pulses in either output state
Figure 2-3
Getting HearBeat pulses with a pull-down resistor
3
46
5
1
+2.5 to 5
7
2
OUT
OPT1
OPT2
GA IN
SNS1
SNS2
Vss
Vdd
8
Ro
H eartBeat™ P u lses
Microcontroller
PORT_M.x
PORT_M.y
3
46
5
7
2
OUT
OPT1
OPT2
GAIN
SNS1
SNS2
Ro
Figure 2-5 Eliminating HB Pulses
3
46
5
7
2
OUT
OPT1
OPT2
GAIN
SNS1
SNS2
CM O S
100pF
Co
GATE OR
MICRO INPU T


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