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LM2655 Datasheet(PDF) 6 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Part # LM2655
Description  2.5A High Efficiency Synchronous Switching Regulator
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM2655 Datasheet(HTML) 6 Page - National Semiconductor (TI)

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Low-side Driver (LDR) Parameters
Specifications with standard typeface are for T
J = 25˚C, and those in boldface type apply over full Operating Temperature
Range.V
IN = 10V unless otherwise specified.
Symbol
Parameter
Conditions
Typical
(Note 5)
Limit
(Note 6)
Units
V
OH
Logic High Level
V
IN = 10V
6.8
6.6
V
V(min)
V
IN = 6.0V
6
5.8
V
V(min)
V
OL
Logic Low Level
0
0.05
V
V(max)
I
SINK
LDR Sink Current
LDR Voltage = 1V
500
mA
I
SOURCE
LDR Source Current
LDR Voltage = 2V
180
mA
T
RR
Rise Time
C
GS=1000pF
18
ns
T
F
Fall Time
C
GS=1000pF
7
ns
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is in-
tended to be functional, but device parameter specifications may not be guaranteed under these conditions. For guaranteed specifications and test conditions, see
the Electrical Characteristics.
Note 2: The maximum allowable power dissipation is calculated by using PDMAX = (TJMAX −TA)/θJA, where TJMAX is the maximum junction temperature, TA is the
ambient temperature, and
θJA is the junction-to-ambient thermal resistance of the specified package. The 893 mW rating results from using 150˚C, 25˚C, and
140˚C/W for TJMAX,TA, and θJA respectively. A θJA of 140˚C/W represents the worst-case condition of no heat sinking of the 16-pin TSSOP package. Heat sinking
allows the safe dissipation of more power. The Absolute Maximum power dissipation must be derated by 7.14 mW per ˚C above 25˚C ambient. The LM2655 actively
limits its junction temperatures to about 165˚C.
Note 3: The human body model is a 100 pF capacitor discharged through a 1.5 k
Ω resistor into each pin. The machine model is a 200pF capacitor discharged di-
rectly into each pin.
Note 4: ESD susceptibility using the human body model is 500V for VCB,VSW, LDR, and LDELAY.
Note 5: Typical numbers are at 25˚C and represent the most likely norm.
Note 6: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100% pro-
duction tested. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to cal-
culate Average Outgoing Quality Level (AOQL).
Note 7: Measured with respect to VSW.
Note 8: Measured while switching in closed loop with Vin = 15V.
Note 9: Average output current limit obtained using typical application circuit. This figure is dependant on the the inductor used.
Note 10: Bond wire resistance accounts for approximately 40m
Ω of RSW(ON).
Typical Performance Characteristics
Efficiency vs Load Current
(V
IN =5V, VOUT = 3.3V)
DS101284-5
Efficiency vs V
IN
(I
LOAD = 0.5A) (Synchronous)
DS101284-6
www.national.com
6


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