TPS54373

SLVS455A − JANUARY 2003 − REVISED JUNE 2003

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4

ELECTRICAL CHARACTERISTICS (continued)

TJ = −40

°C to 125°C, VI = 3 V to 6 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

ERROR AMPLIFIER

Error amplifier open loop voltage gain

1 k

Ω COMP to AGND(1)

90

110

dB

Error amplifier unity gain bandwidth

Parallel 10 k

Ω, 160 pF COMP to AGND(1)

3

5

MHz

Error amplifier common mode input voltage range

Powered by internal LDO(1)

0

VBIAS

V

Input bias current, VSENSE

VSENSE = Vref

60

250

nA

Output voltage slew rate (symmetric), COMP(1)

1.0

1.4

V/

µs

PWM COMPARATOR

PWM comparator propagation delay time,

PWM comparator input to PH pin (excluding

deadtime)

10-mV overdrive(1)

70

85

ns

SLOW-START/ENABLE

Enable threshold voltage, SS/ENA

0.82

1.20

1.40

V

Enable hysteresis voltage, SS/ENA

0.03

V

Falling edge deglitch, SS/ENA(1)

2.5

µs

Internal slow-start time

2.6

3.35

4.1

ms

Charge current, SS/ENA

SS/ENA = 0 V

3

5

8

µA

Discharge current, SS/ENA

SS/ENA = 0.2 V, VI = 2.7 V

1.5

2.3

4.0

mA

POWER GOOD

Power good threshold voltage

VSENSE falling

90

%Vref

Power good hysteresis voltage(1)

3

%Vref

Power good falling edge deglitch(1)

35

µs

Output saturation voltage, PWRGD

I(sink) = 2.5 mA

0.18

0.3

V

Leakage current, PWRGD

VI = 5.5 V

1

µA

CURRENT LIMIT

Current limit trip point

VI = 3 V Output shorted(1)

4

6.5

A

Current limit trip point

VI = 6 V Output shorted(1)

4.5

7.5

A

Current limit leading edge blanking time(1)

100

ns

Current limit total response time(1)

200

ns

THERMAL SHUTDOWN

Thermal shutdown trip point(1)

135

150

165

°C

Thermal shutdown hysteresis(1)

10

°C

OUTPUT POWER MOSFETS

rDS(on) Power MOSFET switches

VI = 6 V(4)

59

88

m

Ω

rDS(on) Power MOSFET switches

VI = 3 V(4)

85

136

m

Ω

(1) Specified by design

(2) Static resistive loads only

(3) Specified by the circuit used in Figure 10

(4) Matched MOSFETs low-side rDS(on) production tested, high-side rDS(on) specified by design