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LM2679 Datasheet(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Part No. LM2679
Description  SIMPLE SWITCHER 5A Step-Down Voltage Regulator with Adjustable Current Limit
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
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All Output Voltage Versions
Electrical Characteristics
Limits appearing in bold type face apply over the entire junction temperature range of operation, −40˚C to 125˚C.
Specifications appearing in normal type apply for T
A =TJ = 25˚C. Unless otherwise specified VIN=12V for the 3.3V, 5V and
Adjustable versions and V
IN=24V for the 12V version.
Symbol
Parameter
Conditions
Typ
Min
Max
Units
DEVICE PARAMETERS
I
Q
Quiescent
Current
V
FEEDBACK = 8V
4.2
6
mA
For 3.3V, 5.0V, and ADJ Versions
V
FEEDBACK = 15V
For 12V Versions
V
ADJ
Current Limit
Adjust Voltage
1.21
1.181/1.169
1.229/1.246
V
I
CL
Current Limit
R
ADJ = 5.6KΩ, (Note 5)
6.3
5.5/5.3
7.6/8.1
A
I
L
Output
Leakage
Current
V
IN = 40V, Softstart Pin = 0V
V
SWITCH =0V
V
SWITCH = −1V
1.0
6
1.5
15
mA
mA
R
DS(ON)
Switch
On-Resistance
I
SWITCH = 5A
0.12
0.14/0.225
f
O
Oscillator
Frequency
Measured at Switch Pin
260
225
280
kHz
D
Duty Cycle
Maximum Duty Cycle
91
%
Minimum Duty Cycle
0
%
I
BIAS
Feedback Bias
Current
V
FEEDBACK = 1.3V
ADJ Version Only
85
nA
V
SFST
Softstart
Threshold
Voltage
0.63
0.53
0.74
V
I
SFST
Softstart Pin
Current
Softstart Pin = 0V
3.7
6.9
µA
θ
JA
Thermal
Resistance
T Package, Junction to Ambient
65
(Note 6)
θ
JA
T Package, Junction to Ambient
45
(Note 7)
θ
JC
T Package, Junction to Case
2
θ
JA
S Package, Junction to Ambient
56
˚C/W
(Note 8)
θ
JA
S Package, Junction to Ambient
35
(Note 9)
θ
JA
S Package, Junction to Ambient
26
(Note 10)
θ
JC
S Package, Junction to Case
2
++
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings indicate conditions under which of the device is
guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test condition, see the electrical Char-
acteristics tables.
Note 2: ESD was applied using the human-body model, a 100pF capacitor discharged through a 1.5 k
Ω resistor into each pin.
Note 3: Typical values are determined with TA =TJ = 25˚C and represent the most likely norm.
Note 4: All limits are guaranteed at room temperature (standard type face) and at temperature extremes (bold type face). All room temperature limits are 100%
tested during production with TA =TJ = 25˚C. All limits at temperature extremes are guaranteed via correlation using standard standard Quality Control (SQC) meth-
ods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
Note 5: The peak switch current limit is determined by the following relationship: ICL=37,125/ RADJ.
Note 6: Junction to ambient thermal resistance (no external heat sink) for the 7 lead TO-220 package mounted vertically, with 12 inch leads in a socket, or on a PC
board with minimum copper area.
Note 7: Junction to ambient thermal resistance (no external heat sink) for the 7 lead TO-220 package mounted vertically, with 12 inch leads soldered to a PC board
containing approximately 4 square inches of (1 oz.) copper area surrounding the leads.
www.national.com
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