DSP56F805 datasheet(11/48 Pages) MOTOROLA

Part #	DSP56F805

Description	16-bit Hybrid Controller

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Manufacturer	MOTOROLA [Motorola, Inc]

Direct Link	http://www.freescale.com

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GPIO Signals

56F805 Technical Data

11

2.6 GPIO Signals

2.7 Pulse Width Modulator (PWM) Signals

1

RSTO

Output

Reset Output—This output reflects the internal reset state of the

chip.

1

EXTBOOT

Input

(Schmitt)

Input

External Boot—This input is tied to VDD to force device to boot

from off-chip memory. Otherwise, it is tied to VSS.

Table 11. Dedicated General Purpose Input/Output (GPIO) Signals

No. of

Pins

Signal

Name

Signal

Type

State During

Reset

Signal Description

8

GPIOB0–

GPIOB7

Input

or

Output

Input

Port B GPIO—These eight dedicated General Purpose I/O

(GPIO) pins can be individually programmed as input or output

pins.

After reset, the default state is GPIO input.

6

GPIOD0–

GPIOD5

Input

or

Output

Input

Port D GPIO—These six dedicated General Purpose I/O (GPIO)

pins can be individually programmed as input or output pins.

After reset, the default state is GPIO input.

Table 12. Pulse Width Modulator (PWMA and PWMB) Signals

No. of

Pins

Signal Name

Signal

Type

State During

Reset

Signal Description

6

PWMA0–5

Output

Tri- stated

PWMA0–5—These are six PWMA output pins.

3

ISA0–2

Input

(Schmitt)

Input

ISA0–2—These three input current status pins are used for

top/bottom pulse width correction in complementary

channel operation for PWMA.

4

FAULTA0–3

Input

(Schmitt)

Input

FAULTA0–3—These four Fault input pins are used for

disabling selected PWMA outputs in cases where fault

conditions originate off-chip.

6

PWMB0–5

Output

PWMB0–5—These are six PWMB output pins.

3

ISB0–2

Input

(Schmitt)

Input

ISB0–2— These three input current status pins are used

for top/bottom pulse width correction in complementary

channel operation for PWMB.

4

FAULTB0–3

Input

(Schmitt)

Input

FAULTB0–3—These four Fault input pins are used for

disabling selected PWMB outputs in cases where fault

conditions originate off-chip.

Table 10. Interrupt and Program Control Signals (Continued)

No. of

Pins

Signal

Name

Signal

Type

State

During

Reset

Signal Description

Freescale Semiconductor, Inc.

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