PIN

NAME

FUNCTION

1

GND_CP

Charge-Pump Ground. Connect to board ground, not to the paddle.

2

GND_SD

Sigma Delta Modulator Ground. Connect to board ground, not to the paddle.

3

GND_PLL

PLL Ground. Connect to board ground, not to the paddle.

4

RFINP

Positive RF Input to Prescaler. AC ground through capacitor, if not used.

5

RFINN

Negative RF Input to Prescaler. Connect to VCO output through coupling capacitor.

6

PLL Power Supply. Place decoupling capacitors as close as possible to pin.

7

REF Power Supply. Place decoupling capacitors as close as possible to pin.

8

REF

Reference Frequency Input. This is a high-impedance input with a nominal bias voltage of

9, 10

GND

Ground. Connect to the board ground, not the paddle.

11

CE

Chip Enable. A logic-low powers the device down.

12

CLK

Serial Clock Input. The data is latched into the 32-bit shift register on the rising edge of the CLK line.

13

DATA

Serial Data Input. The serial data is loaded MSB first. The 3 LSBs identify the register address.

14

LE

Load Enable Input. When LE goes high the data stored in the shift register is loaded into the

appropriate register.

15

MUX

Multiplexed I/O. See Table 5.

16

RF Power Supply. Place decoupling capacitors as close as possible to pin.

17

Sigma Delta Modulator Power Supply. Place decoupling capacitors as close as possible to pin.

18

Charge-Pump Power Supply. Place decoupling capacitors as close as possible to the pin.

19

RSET

Charge-Pump Current Range Input. Connect an external resistor to ground to set the minimum CP

20

CP

Charge-Pump Output. Connect to external loop filter input.

—

EP

Exposed Pad. Connect to board ground.

RSET

CP

GND

REF

+

GND

TQFN

4mm × 4mm

MAX2880

TOP VIEW

10

9

8

7

6

11

12

13

14

15

5

4

3

2

1

16

17

18

19

20

EP

MAX2880

250MHz to 12.4GHz, High-Performance,

Fractional/Integer-N PLL

www.maximintegrated.com

Maxim Integrated │ 7

Pin Description

Pin Configuration