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MC74HC393ADR2G Datasheet(PDF) 1 Page - ON Semiconductor |
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MC74HC393ADR2G Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 8 page © Semiconductor Components Industries, LLC, 2014 August, 2014 − Rev. 7 1 Publication Order Number: MC74HC393A/D MC74HC393A Dual 4-Stage Binary Ripple Counter High−Performance Silicon−Gate CMOS The MC74HC393A is identical in pinout to the LS393. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of two independent 4−bit binary ripple counters with parallel outputs from each counter stage. A ÷ 256 counter can be obtained by cascading the two binary counters. Internal flip−flops are triggered by high−to−low transitions of the clock input. Reset for the counters is asynchronous and active−high. State changes of the Q outputs do not occur simultaneously because of internal ripple delays. Therefore, decoded output signals are subject to decoding spikes and should not be used as clocks or as strobes except when gated with the Clock of the HC393A. Features • Output Drive Capability: 10 LSTTL Loads • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current: 1 mA • High Noise Immunity Characteristic of CMOS Devices • In Compliance with the JEDEC Standard No. 7 A Requirements • Chip Complexity: 236 FETs or 59 Equivalent Gates • NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable • These Devices are Pb−Free, Halogen Free and are RoHS Compliant LOGIC DIAGRAM Q1 Q2 Q3 Q4 CLOCK RESET 1, 13 2, 12 3, 11 4, 10 5, 9 6, 8 PIN 14 = VCC PIN 7 = GND BINARY COUNTER http://onsemi.com See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. ORDERING INFORMATION MARKING DIAGRAMS A = Assembly Location L, WL = Wafer Lot Y, YY = Year W, WW = Work Week G or G = Pb−Free Package TSSOP−14 DT SUFFIX CASE 948G SOIC−14 NB D SUFFIX CASE 751A HC393AG AWLYWW 1 14 HC 393A ALYW G G 1 14 (Note: Microdot may be in either location) FUNCTION TABLE Inputs Clock Reset Outputs XH L H L No Change L L No Change L No Change L Advance to Next State TSSOP−14 SOIC−14 NB PIN ASSIGNMENT 11 12 13 14 8 9 10 5 4 3 2 1 7 6 Q2b Q1b RESET b CLOCK b VCC Q4b Q3b Q2a Q1a RESET a CLOCK a GND Q3a Q4a |
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