EM638165TS-5G datasheet(6/53 Pages) ETRON

Part #	EM638165TS-5G

Description	4M x 16 bit Synchronous DRAM (SDRAM)

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Manufacturer	ETRON [Etron Technology, Inc.]

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EtronTech

EM638165

Rev. 5.3

6

Dec. /2013

Operation Mode

Fully synchronous operations are performed to latch the commands at the positive edges of CLK. Table 4

shows the truth table for the operation commands.

Table 4. Truth Table (Note (1), (2))

Command

State

CKEn-1 CKEn DQM BA0,1 A10 A0-9,11 CS# RAS# CAS# WE#

BankActivate

Idle(3)

H

X

V

Row address

L

H

BankPrecharge

Any

H

X

V

L

X

L

H

L

PrechargeAll

Any

H

X

H

X

L

H

L

Write

Active(3)

H

X

V

L

Column

address

(A0 ~ A7)

L

H

L

Write and AutoPrecharge

Active(3)

H

X

V

H

L

H

L

Read

Active(3)

H

X

V

L

Column

address

(A0 ~ A7)

L

H

L

H

Read and Autoprecharge

Active(3)

H

X

V

H

L

H

L

H

Mode Register Set

Idle

H

X

OP code

L

Extended Mode Register Set

Idle

H

X

OP code

L

No-Operation

Any

H

X

L

H

Burst Stop

Active(4)

H

X

L

H

L

Device Deselect

Any

H

X

H

X

AutoRefresh

Idle

H

X

L

H

SelfRefresh Entry

Idle

H

L

X

L

H

SelfRefresh Exit

Idle

L

H

X

H

X

(SelfRefresh)

L

H

Clock Suspend Mode Entry

Active

H

L

X

H

X

L

V

Power Down Mode Entry

Any(5)

H

L

X

H

X

L

H

Clock Suspend Mode Exit

Active

L

H

X

Power Down Mode Exit

Any

L

H

X

H

X

(PowerDown)

L

H

Data Write/Output Enable

Active

H

X

L

X

Data Mask/Output Disable

Active

H

X

H

X

Note: 1. V=Valid, X=Don't Care L=Low level H=High level

2. CKEn signal is input level when commands are provided.

CKEn-1 signal is input level one clock cycle before the commands are provided.

3. These are states of bank designated by BA signal.

4. Device state is 1, 2, 4, 8, and full page burst operation.

5. Power Down Mode can not enter in the burst operation.

When this command is asserted in the burst cycle, device state is clock suspend mode.

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