PIN

NAME

FUNCTION

1, 7

N.C.

No Connection

2

SYNC

Frequency Synchronization. The device can be synchronized to an external clock using this pin.

See the External Frequency Synchronization (SYNC) section for more details.

3

SS

Soft-Start Input. Connect a capacitor from SS to SGND to set the soft-start.

4

CF

Compensation Filter. Connect capacitor from CF to FB to correct frequency response in

applications using non-ceramic output capacitors with switching frequency below 500kHz. Leave

CF open otherwise.

5

FB

Feedback Input. Connect FB to the center tap of an external resistor-divider from the OUT to

SGND to set the output voltage. See the Setting the Output Voltage section for more details.

6

RT

Frequency Set. Connect a resistor from RT to SGND to set the regulator’s switching frequency.

Leave RT open for the default 500kHz frequency.

8

MODE

Light-Load Mode Selection. The MODE pin configures the MAXM17544 to operate in PWM, PFM,

or DCM mode of operation. Leave MODE unconnected for PFM operation (pulse-skipping at light-

loads). Connect MODE to SGND for constant-frequency PWM operation at all loads. Connect

9

5V LDO Output. No external connection.

10

SGND

Analog Ground. Internally-shorted to PGND. Connect it to PGND through a single point at output

capacitor.

11, 26

PGND

Power Ground. Connect the PGND pins externally to the power ground plane.

12–18

OUT

Regulator Output Pin. Connect a capacitor from OUT to PGND. See PCB Layout Guidelines

section for more connection details.

19–24

LX

Internally Connected to EP2. Please do not connect these pins to external components for any

reason.

25

BST

Boost Flying Cap Node. No external connection.

27

IN

Input Supply Connection. Bypass to PGND with a capacitor; place the capacitor close to the IN

and PGND pins. See Table 1 for more details

28

EN

Enable/Undervoltage-Lockout Input. Default enable through the pullup 3.3MΩ resistor between

EN and IN. Connect a resistor from EN to SGND to set the UVLO threshold.

29

RESET

Open-Drain RESET Output. The RESET output is driven low if FB drops below 92% of its set

value. RESET goes high 1024 clock cycles after FB rises above 95% of its set value.

EP1

SGND

Analog Ground. Connect this pad to 1in x 1in copper island with a lot of vias for cooling.

EP2

LX

Switching Node. Connect this pad to a small copper area of 1in x 1in under the device for thermal

relief.

EP3

OUT

Connect this pad to the OUT pins and copper area of 1in x 1in.

MAXM17544

4.5V to 42V, 3.5A High-Efficiency, DC-DC Step-

Down Power Module with Integrated Inductor

www.maximintegrated.com

Maxim Integrated │ 11

Pin Description