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S-24C08C Datasheet(PDF) 11 Page - Seiko Instruments Inc |
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S-24C08C Datasheet(HTML) 11 Page - Seiko Instruments Inc |
11 / 33 page 2-WIRE SERIAL E2PROM Rev.1.0_00_H S-24C08C (WLP PRODUCT) 11 5. Device addressing To start communication, the master device on the system generates a start condition to the bus line. Next, the master device sends 7-bit device address and a 1-bit read / write instruction code on to the SDA bus. The upper 4 bits of the device address are the “Device Code”, and are fixed to “1010”. In the S-24C08C, successive 1 bit is called the “Slave Addrdess”. This 1 bit is used to identify a device on the system bus and is compared with the predetermined value which is defined by the address input pin (A2). When the comparison result matches, the slave device responds with an acknowledge during the 9th clocks cycle. The successive 2 bits (P1 and P0) are used to define a page address and choose the four 256-byte memory blocks (Address 000h to 0FFh, 100h to 1FFh, 200h to 2FFh and 300h to 3FFh). Slave / Page Address 1 0 1 0 A2 P1 P0 R / W Device Code LSB MSB Figure 10 Device Address |
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